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Mitsubishi Electric MELSEC FX Series Structured Programming Manual
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Mitsubishi Electric MELSEC FX Series Structured Programming Manual

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MITSUBISHI ELECTRIC
Programmable Controllers
Structured Programming Manual
[Basic & Applied Instruction]
FXCPU
01 07 2009
INDUSTRIAL AUTOMATION
MITSUBISHI ELECTRIC
JY997D34701
Version B

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Summary of Contents for Mitsubishi Electric MELSEC FX Series

  • Page 1 MITSUBISHI ELECTRIC Programmable Controllers Structured Programming Manual [Basic & Applied Instruction] FXCPU 01 07 2009 INDUSTRIAL AUTOMATION MITSUBISHI ELECTRIC JY997D34701 Version B...
  • Page 3 This manual confers no industrial property rights or any rights of any other kind, nor does it confer any patent licenses. Mitsubishi Electric Corporation cannot be held responsible for any problems involving industrial property rights which may occur as a result of using the contents noted in this manual.
  • Page 4 • Since the examples within this manual, technical bulletin, catalog, etc. are used as reference; please use it after confirming the function and safety of the equipment and system. Mitsubishi Electric will not accept responsibility for actual use of the product based on these illustrative examples.
  • Page 5 FXCPU Structured Programming Manual (Basic & Applied Instruction) Table of Contents Table of Contents Positioning of This Manual....................... 9 Related Manuals ........................12 Generic Names and Abbreviations Used in Manuals ............15 1. Outline 1.1 Outline of Structured Programs and Programming languages ............. 16 1.1.1 Outline of Structured Programs .....................
  • Page 6 FXCPU Structured Programming Manual (Basic & Applied Instruction) Table of Contents 5.14 NOP (for simple project only) ...................... 99 6. Step Ladder Instructions 6.1 Step Ladder..........................100 6.1.1 Outline ............................100 6.1.2 Function and operation explanation .................... 100 6.1.3 Program examples ........................108 6.2 STL..............................
  • Page 7 FXCPU Structured Programming Manual (Basic & Applied Instruction) Table of Contents 7.5.4 SUM............................. 246 7.5.5 BON............................. 249 7.5.6 MEAN ............................252 7.5.7 ANS ............................. 254 7.5.8 ANR ............................. 256 7.5.9 SQR............................. 258 7.5.10 FLT ............................260 7.6 High Speed Processing....................... 264 7.6.1 REF .............................
  • Page 8 FXCPU Structured Programming Manual (Basic & Applied Instruction) Table of Contents 7.12 Floating Point ..........................449 7.12.1 DECMP............................449 7.12.2 DEZCP ............................451 7.12.3 DEMOV ............................. 453 7.12.4 DESTR ............................455 7.12.5 DEVAL............................462 7.12.6 DEBCD ............................468 7.12.7 DEBIN............................470 7.12.8 DEADD ............................
  • Page 9 FXCPU Structured Programming Manual (Basic & Applied Instruction) Table of Contents 7.18.3 DUTY............................602 7.18.4 CRC............................605 7.18.5 DHCMOV........................... 609 7.19 Block Data Operation ........................ 614 7.19.1 BK+............................614 7.19.2 BK-............................. 618 7.19.3 BKCMP=, BKCMP>, BKCMP<, BKCMP<>, BKCMP<=, BKCMP>= ......... 622 7.20 Character String Control ......................
  • Page 10 FXCPU Structured Programming Manual (Basic & Applied Instruction) Table of Contents 8. Interrupt Function and Pulse Catch Function 8.1 Outline............................805 8.2 Common items ..........................806 8.2.1 Interrupt function.......................... 806 8.2.2 How to disable interrupt function and pulse catch function ............807 8.2.3 Related items..........................
  • Page 11 FXCPU Structured Programming Manual (Basic & Applied Instruction) Positioning of This Manual This manual explains sequence instructions for structured programs provided by GX Works2. Refer to other manuals for devices, parameters and application functions. Refer to each corresponding manual for analog, communication, positioning control and special units and blocks.
  • Page 12 FXCPU Structured Programming Manual (Basic & Applied Instruction) 2. When using FX PLCs QCPU/FXCPU Structured Programming Manual (Fundamentals) (Additional Manual) This manual explains programming methods, specifications, functions, etc. required to create Q/FX structured programs. Structured FXCPU Structured Programming Manual (Device & Common) (Additional Manual) This manual explains devices and parameters for structured programs provided by GX Works2.
  • Page 13 FXCPU Structured Programming Manual (Basic & Applied Instruction) 3. When using FX PLCs QCPU/FXCPU Structured Programming Manual (Fundamentals) (Additional Manual) This manual explains programming methods, specifications, functions, etc. required to create Q/FX structured programs. Structured FXCPU Structured Programming Manual (Device & Common) (Additional Manual) This manual explains devices and parameters for structured programs provided by GX Works2.
  • Page 14 FXCPU Structured Programming Manual (Basic & Applied Instruction) Related Manuals This manual explains devices and parameters for structured programs provided by GX Works2. Refer to other manuals for sequence instructions and applied functions. This chapter introduces only reference manuals for this manual and manuals which describe the hardware information of PLC main units.
  • Page 15 FXCPU Structured Programming Manual (Basic & Applied Instruction) Supplied with product Model Manual name Manual number Contents or Additional Manual name code Programming Detaileds about the analog special function block User's Manual- -4AD, FX -4DA, FX -4AD) and analog JY997D16701 Additional Manual 09R619 Analog Control Edition...
  • Page 16 FXCPU Structured Programming Manual (Basic & Applied Instruction) PLCs [whose production is finished] Supplied with product Model Manual name Manual number Contents or Additional Manual name code PLC main unit Details about the hardware including I/O HARDWARE MANUAL JY992D47501 Supplied with product specifications, wiring, installation and maintenance of the FX PLC main unit.
  • Page 17 FXCPU Structured Programming Manual (Basic & Applied Instruction) Generic Names and Abbreviations Used in Manuals Abbreviation/generic name Name PLCs Series or FX Generic name of FX Series PLCs Series or FX Generic name of FX Series PLCs Series or FX Generic name of FX Series PLCs Series or FX...
  • Page 18 FXCPU Structured Programming Manual 1 Outline (Basic & Applied Instruction) 1.1 Outline of Structured Programs and Programming Outline This manual explains setting of sequence instructions for structured programs provided by GX Works2. Refer to another manuals for device, parameter, and application functions for structured programs. Refer to the following manual for label, data types and programming languages for structured programs.
  • Page 19 FXCPU Structured Programming Manual 1 Outline (Basic & Applied Instruction) 1.2 PLC Series and Programming Software Version 1.1.2 Programming languages The following programming languages can be used in each program block. Graphic languages 1. Structured ladder language This graphic language is created based on the relay circuit design technology. Any circuit always starts from the bus line located on the leftmost.
  • Page 20 FXCPU Structured Programming Manual 1 Outline (Basic & Applied Instruction) 1.3 Cautions on Creation of Fundamental Programs Cautions on Creation of Fundamental Programs This section explains cautions on programming. Refer to the following manual for cautions on structured programs and programming languages: →...
  • Page 21 FXCPU Structured Programming Manual 1 Outline (Basic & Applied Instruction) 1.3 Cautions on Creation of Fundamental Programs 1.3.2 Double output (double coil) operation and countermeasures This subsection explains the double output (double coil) operation and countermeasures. 1. Operation of double output When a coil (output variable) is used twice (double coil) in another program block to be executed or in the same program block, the PLC gives priority to the last coil.
  • Page 22 FXCPU Structured Programming Manual 1 Outline (Basic & Applied Instruction) 1.3 Cautions on Creation of Fundamental Programs 1.3.3 Circuits which cannot be created by structured ladder programs and countermeasures 1. Bridge circuit A circuit in which the current flows in both directions should be changed as shown in the figure on the right (so that a circuit without D and a circuit without B are connected in parallel).
  • Page 23 FXCPU Structured Programming Manual 1 Outline (Basic & Applied Instruction) 1.3 Cautions on Creation of Fundamental Programs 1. Program containing many flags (example of instruction execution complete flag M8029) If you program the instruction execution completion flag M8029 for two or more sequence instructions which actuate the flag M8029, you cannot judge easily by which sequence instruction the flag M8029 is controlled.
  • Page 24 FXCPU Structured Programming Manual 1 Outline (Basic & Applied Instruction) 1.3 Cautions on Creation of Fundamental Programs 2. Introduction of method for using flags in any positions other than directly under sequence instructions. When two or more sequence instructions are programmed, general flags turn ON or OFF when each sequence instruction turns ON.
  • Page 25 FXCPU Structured Programming Manual 1 Outline (Basic & Applied Instruction) 1.3 Cautions on Creation of Fundamental Programs 1.3.5 Handling of operation error flag When there is an error in the sequence instruction configuration, target device or target device number range and an error occurs while operation is executed, the following flag turns ON and the error information is store.
  • Page 26 FXCPU Structured Programming Manual 1 Outline (Basic & Applied Instruction) 1.3 Cautions on Creation of Fundamental Programs 1.3.6 Handling of function extension flag In some sequence instructions, the function can be extended by combining a specific special auxiliary relay determined for each sequence instruction. An example is explained below using a structured ladder program. •...
  • Page 27 FXCPU Structured Programming Manual 1 Outline (Basic & Applied Instruction) 1.3 Cautions on Creation of Fundamental Programs , FX , FX , FX and FX PLCs Allowable number of times of use Instruction name , FX , FX , FX ABSD INCD ROTC...
  • Page 28 FXCPU Structured Programming Manual 1 Outline (Basic & Applied Instruction) 1.3 Cautions on Creation of Fundamental Programs Limitation in simultaneous instances of instructions Some instructions can be programmed two or more times, but the number of simultaneous instances is limited. Even in instructions not shown below, if two or more instructions are driven at the same time for a same I/O number, it is regarded as double outputs.
  • Page 29 FXCPU Structured Programming Manual 2 Instruction List (Basic & Applied Instruction) 2.1 Basic Instructions Instruction List This chapter introduces a list of instructions available in programming. Basic Instructions Applicable PLCs Instruction name Function Reference Initial logical operation contact type NO (normally open) Initial logical operation contact type NC (normally closed)
  • Page 30 FXCPU Structured Programming Manual 2 Instruction List (Basic & Applied Instruction) 2.2 Step Ladder Instructions Step Ladder Instructions Applicable PLCs Instruction name Function Reference Starts step ladder Section 6.2 Completes step ladder Section 6.3 Applied Instructions Applicable PLCs Execution Instruction name Function Reference condition...
  • Page 31 FXCPU Structured Programming Manual 2 Instruction List (Basic & Applied Instruction) 2.3 Applied Instructions Applicable PLCs Execution Instruction name Function Reference condition Move and Compare Continuous CMPP Pulse Compare Section 7.2.1 DCMP Continuous DCMPP Pulse Continuous ZCPP Pulse Zone compare Section 7.2.2 DZCP Continuous...
  • Page 32 FXCPU Structured Programming Manual 2 Instruction List (Basic & Applied Instruction) 2.3 Applied Instructions Applicable PLCs Execution Instruction name Function Reference condition Move and Compare Continuous BINP Pulse Conversion to binary Section 7.2.10 DBIN Continuous DBINP Pulse Arithmetic and Logical Operation Continuous ADDP Pulse...
  • Page 33 FXCPU Structured Programming Manual 2 Instruction List (Basic & Applied Instruction) 2.3 Applied Instructions Applicable PLCs Execution Instruction name Function Reference condition Arithmetic and Logical Operation WAND Continuous WANDP Pulse Logical word AND Section 7.3.7 DAND Continuous DANDP Pulse Continuous WORP Pulse Logical word OR...
  • Page 34 FXCPU Structured Programming Manual 2 Instruction List (Basic & Applied Instruction) 2.3 Applied Instructions Applicable PLCs Execution Instruction name Function Reference condition Rotation and Shift Operation SFTR Continuous Bit shift right Section 7.4.5 SFTRP Pulse SFTL Continuous Bit shift left Section 7.4.6 SFTLP Pulse...
  • Page 35 FXCPU Structured Programming Manual 2 Instruction List (Basic & Applied Instruction) 2.3 Applied Instructions Applicable PLCs Execution Instruction name Function Reference condition Data Operation Continuous Annuncator reset Section 7.5.8 ANRP Pulse Continuous SQRP Pulse Square root Section 7.5.9 DSQR Continuous DSQRP Pulse Continuous...
  • Page 36 FXCPU Structured Programming Manual 2 Instruction List (Basic & Applied Instruction) 2.3 Applied Instructions Applicable PLCs Execution Instruction name Function Reference condition Handy Instruction ABSD Continuous Absolute drum sequencer Section 7.7.3 DABSD Continuous INCD Continuous Incremental drum sequencer Section 7.7.4 TTMR Continuous Teaching timer Section 7.7.5...
  • Page 37 FXCPU Structured Programming Manual 2 Instruction List (Basic & Applied Instruction) 2.3 Applied Instructions Applicable PLCs Execution Instruction name Function Reference condition External Device (optional devices) Continuous Serial Communication Section 7.9.1 PRUN Continuous PRUNP Pulse Parallel run (octal mode) Section 7.9.2 DPRUN Continuous DPRUNP...
  • Page 38 FXCPU Structured Programming Manual 2 Instruction List (Basic & Applied Instruction) 2.3 Applied Instructions Applicable PLCs Execution Instruction name Function Reference condition External Device RMRD Continuous RMRDP Pulse Read from F2-32RM Section 7.10.6 DRMRD Continuous DRMRDP Pulse RMMN Continuous F2-32RM monitor Section 7.10.7 RMMNP Pulse...
  • Page 39 FXCPU Structured Programming Manual 2 Instruction List (Basic & Applied Instruction) 2.3 Applied Instructions Applicable PLCs Execution Instruction name Function Reference condition Floating Point DESUB Continuous Floating point subtraction Section 7.12.9 DESUBP Pulse DEMUL Continuous Floating point multiplication Section 7.12.10 DEMULP Pulse DEDIV...
  • Page 40 FXCPU Structured Programming Manual 2 Instruction List (Basic & Applied Instruction) 2.3 Applied Instructions Applicable PLCs Execution Instruction name Function Reference condition Floating Point DRAD Continuous Floating point degrees to radians Section 7.12.24 conversion DRADP Pulse DDEG Continuous Floating point radians to degrees Section 7.12.25 conversion DDEGP...
  • Page 41 FXCPU Structured Programming Manual 2 Instruction List (Basic & Applied Instruction) 2.3 Applied Instructions Applicable PLCs Execution Instruction name Function Reference condition Positioning Control DRVI Continuous Drive to increment Section 7.14.7 DDRVI Continuous DRVA Continuous Drive to absolute Section 7.14.8 DDRVA Continuous Real Time Clock Control...
  • Page 42 FXCPU Structured Programming Manual 2 Instruction List (Basic & Applied Instruction) 2.3 Applied Instructions Applicable PLCs Execution Instruction name Function Reference condition External Device GBIN Continuous GBINP Pulse Gray code to decimal conversion Section 7.16.2 DGBIN Continuous DGBINP Pulse RD3A Continuous Read from dedicated analog block Section 7.16.3...
  • Page 43 FXCPU Structured Programming Manual 2 Instruction List (Basic & Applied Instruction) 2.3 Applied Instructions Applicable PLCs Execution Instruction name Function Reference condition Block Data Operation BKCMP= Continuous BKCMP> Continuous BKCMP< Continuous BKCMP<> Continuous BKCMP<= Continuous BKCMP>= Continuous BKCMP=P Pulse BKCMP>P Pulse BKCMP<P Pulse...
  • Page 44 FXCPU Structured Programming Manual 2 Instruction List (Basic & Applied Instruction) 2.3 Applied Instructions Applicable PLCs Execution Instruction name Function Reference condition Character String Control Continuous Link character strings Section 7.20.3 Pulse Continuous Character string length detection Section 7.20.4 LENP Pulse RIGHT Continuous Extracting character string data...
  • Page 45 FXCPU Structured Programming Manual 2 Instruction List (Basic & Applied Instruction) 2.3 Applied Instructions Applicable PLCs Execution Instruction name Function Reference condition Data Comparison Continuous LD> Continuous LD< Continuous LD<> Continuous LD<= Continuous LD>= Continuous Load compare Section 7.22.1 LDD= Continuous LDD>...
  • Page 46 FXCPU Structured Programming Manual 2 Instruction List (Basic & Applied Instruction) 2.3 Applied Instructions Applicable PLCs Execution Instruction name Function Reference condition Data Comparison Continuous OR> Continuous OR< Continuous OR<> Continuous OR<= Continuous OR>= Continuous OR compare Section 7.22.3 ORD= Continuous ORD>...
  • Page 47 FXCPU Structured Programming Manual 2 Instruction List (Basic & Applied Instruction) 2.3 Applied Instructions Applicable PLCs Execution Instruction name Function Reference condition Data Table Operation DABIN Continuous DABINP Pulse Decimal ASCII to BIN conversion Section 7.23.5 DDABIN Continuous DDABINP Pulse BINDA Continuous BINDAP...
  • Page 48 FXCPU Structured Programming Manual 2 Instruction List (Basic & Applied Instruction) 2.3 Applied Instructions Applicable PLCs Execution Instruction name Function Reference condition Extension File Register Control LOADR Continuous Load from ER Section 7.27.1 LOADRP Pulse SAVER Continuous Save to ER Section 7.27.2 INITR Continuous...
  • Page 49 FXCPU Structured Programming Manual 3 Configuration of Instruction (Basic & Applied Instruction) 3.1 Expression and Operation Form of Sequence Configuration of Instruction This chapter explains the configuration of sequence instructions. Expression and Operation Form of Sequence Instructions Instructions and arguments •...
  • Page 50 FXCPU Structured Programming Manual 3 Configuration of Instruction (Basic & Applied Instruction) 3.1 Expression and Operation Form of Sequence Instruction mode and Operation form Instructions are divided into "16-bit instructions" and "32-bit instructions" depending on the size of values they handle.
  • Page 51 FXCPU Structured Programming Manual 3 Configuration of Instruction (Basic & Applied Instruction) 3.2 Labels Labels Types of labels Labels are either global labels or local labels. • Global labels are available for use in program blocks and function blocks. • Local labels are available for use only in a declared program part. Label classes The label classes indicate how they are used in which program parts.
  • Page 52 FXCPU Structured Programming Manual 3 Configuration of Instruction (Basic & Applied Instruction) 3.2 Labels • When using as a local label: Set the class, label name and data type. Expressing constants The following describes the method of expression when setting constant to a label. Type of constant Method of expression Example...
  • Page 53 FXCPU Structured Programming Manual 3 Configuration of Instruction (Basic & Applied Instruction) 3.2 Labels • The universal data type is the data type of a label that puts together several basic data types. The data type name starts with "ANY". ANY_SIMPLE Array Structure...
  • Page 54 FXCPU Structured Programming Manual 3 Configuration of Instruction (Basic & Applied Instruction) 3.3 Devices and Addresses Devices and Addresses A device is expressed by a device or an address. Device The device is expressed by a device name and a device number. D 100 Device name Device number...
  • Page 55 FXCPU Structured Programming Manual 3 Configuration of Instruction (Basic & Applied Instruction) 3.4 EN and ENO EN and ENO The execution control is available for an instruction with "EN". • EN is for entering an execution condition of instruction. • ENO is for outputting the state of execution of instruction. •...
  • Page 56 FXCPU Structured Programming Manual 4 How to Read Explanation of Instructions (Basic & Applied Instruction) How to Read Explanation of Instructions The following shows one of the pages that explains the instructions. * The above is different from the actual page, as it is provided for explanation only.
  • Page 57 FXCPU Structured Programming Manual 4 How to Read Explanation of Instructions (Basic & Applied Instruction) 1) Indicates the corresponding chapter, section, subsection, number and instruction name. 2) Indicates the PLCs that support the instruction. Item Descriptions Supported by PLCs from the first release. The support conditions depend on the versions.
  • Page 58 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.1 LD, LDI, AND, ANI, OR, OR Basic Instruction This chapter introduces the instructions and operators for the structured project corresponding to the basic instructions for the simple project. Refer to the following manual for variable, instruction and data type.
  • Page 59 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.1 LD, LDI, AND, ANI, OR, OR Function and operation explanation 1. LD (Initial logical operation of NO (normally open) contacts) [Structured ladder] [ ST ] Y000 X000 Y000:= X000; Bus line timing chart X000...
  • Page 60 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.1 LD, LDI, AND, ANI, OR, OR 3. AND (Serial connection of NO (normally open) contacts) [Structured ladder] [ ST ] Y003:= X002 AND X000; X002 X000 Y003 timing chart X002 X000 Y003...
  • Page 61 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.1 LD, LDI, AND, ANI, OR, OR 6. ORI (Parallel connection of NC (normally closed) contacts) [Structured ladder] [ ST ] X000 Y001 Y001:= X000 OR NOT X002; X002 timing chart X000 X002...
  • Page 62 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.1 LD, LDI, AND, ANI, OR, OR Cautions 1) Some restrictions to applicable devices 1: The FX and FX PLCs only are applicable. 2: Only the FX and FX PLCs are capable of indexing applicable devices.
  • Page 63 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.2 LDP, LDF, ANDP, ANDF, ORP, ORF LDP, LDF, ANDP, ANDF, ORP, ORF 3U(C) 2N(C) 1N(C) 0(S) Outline Contact instructions LDP, ANDP, and ORP detect the rising edge, and become active during one operation cycle only at the rising edge of a specified bit device (that is, when the bit device turns ON from OFF).
  • Page 64 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.2 LDP, LDF, ANDP, ANDF, ORP, ORF 3. Applicable devices Bit Devices Word Devices Others System Special Real Character System User Digit Specification Index Constant Pointer Instruction User Unit Number String X Y M T C S D .b KnX KnY KnM KnS T C D R U \G...
  • Page 65 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.2 LDP, LDF, ANDP, ANDF, ORP, ORF 2. LDF, ANDF, ORF (Initial logical operation of falling/trailing edge pulse, serial connection and parallel connection) [Structured ladder] [ ST ] IF (LDF(TRUE,X0)) OR (LDF(TRUE,X001)) THEN M0:= TRUE;...
  • Page 66 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.2 LDP, LDF, ANDP, ANDF, ORP, ORF 4. Output drive side The following two circuits offer the same operation. <OUT instruction> <Pulse instruction> X010 X010 X010 operation cycle operation cycle In each circuit, M6 is ON during only one operation cycle when X010 turns ON from OFF.
  • Page 67 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.2 LDP, LDF, ANDP, ANDF, ORP, ORF 5. Differences in the operation caused by auxiliary relay (M) numbers Not supported by the FX , FX or FX PLC. When an auxiliary relay (M) is specified as a device in LDP, LDF, ANDP, ANDF, ORP and ORF instructions, the operation varies depending on the device number range as shown in the figure below.
  • Page 68 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.2 LDP, LDF, ANDP, ANDF, ORP, ORF Cautions 1) When LDP, LDF, ANDP, ANDF, ORP or ORF instruction programmed in a same step is executed two or more times within one operation cycle, the operation is as follows. Programs executed two or more times - Program between FOR and NEXT instructions - Program which executes a same subroutine program from two or more...
  • Page 69 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.3 OUT (Excluding timers and counters) OUT (Excluding timers and counters) 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction outputs the operation result up to the execution of the OUT instruction to the specified device. 1.
  • Page 70 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.3 OUT (Excluding timers and counters) Function and operation explanation 1. When a bit device is used A device described in OUT instruction turns ON or OFF according to the driven contact status. Parallel OUT instructions can be used consecutively as many times as necessary.
  • Page 71 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.3 OUT (Excluding timers and counters) Cautions 1) Some restrictions to applicable devices 1: The FX and FX PLCs only are applicable. 2: Only the FX and FX PLCs are capable of indexing applicable devices. The following devices cannot be indexed.
  • Page 72 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.4 Operating Timer Operating Timer 5.4.1 OUT_T 3U(C) 2N(C) 1N(C) 0(S) Outline An output is generated when a set time expires. 1. Format and operation, execution form Expression in each language Instruction Execution Operation...
  • Page 73 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.4 Operating Timer Function and operation explanation 1. OUT_T operation 1) When the operation result up to the OUT_T operation is ON, the timer coils is ON and counts until the set value is reached.
  • Page 74 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.4 Operating Timer Cautions 1) When a timer device is specified in a program, use the following depending on the locations of use. - Used as contacts: TS - Used as a coil: TC - Used as a current value: TN 2) Use the timer T192 to T199 within a subroutine or interrupt routine.
  • Page 75 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.4 Operating Timer Program example 1. Program that turns ON Y010 and Y014 in 10 seconds after X000 turns ON. [Structured ladder] [ ST ] OUT_T(X000,TC1,100); X000 OUT_T OUT(TS1,Y010); OUT(TS1,Y014);...
  • Page 76 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.5 Operating Counters Operating Counters 5.5.1 OUT_C, OUT_C_32 3U(C) 2N(C) 1N(C) 0(S) Outline The counter starts counting when the condition turns ON from OFF. It generates an output when counting up to the set value.
  • Page 77 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.5 Operating Counters Function and operation explanation 1. OUT_C operation 1) When the operation result up to the OUT_C turns ON from OFF, the counter counts up the current value (count value) by +1.
  • Page 78 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.5 Operating Counters Program example 1. This program turns ON Y30 when X0 turns ON 10 times and resets the counter when X1 turns ON. [Structured ladder] [ ST ] OUT_C X000 OUT_C(X0,CC10,10);...
  • Page 79 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.6 AND(...), OR(...) AND(...), OR(...) 3U(C) 2N(C) 1N(C) 0(S) Outline Use AND (...) instruction to connect a branch circuit (parallel circuit block) to the preceding circuit in series. Use OR (...) instruction to connect a series circuit block in parallel. 1.
  • Page 80 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.6 AND(...), OR(...) Function and operation explanation 1. AND(...)(Serial connection of circuit blocks) AND (...) is an independent instruction not associated with any device number in the same way as the OR (...) instruction described later.
  • Page 81 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.7 MPS, MRD, MPP MPS, MRD, MPP 3U(C) 2N(C) 1N(C) 0(S) Outline These PLCs have 11 memories called "Stack" which store the intermediate result (ON or OFF) of operations. 1.
  • Page 82 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.7 MPS, MRD, MPP Function and operation explanation These instructions are convenient in programming branched multi-output circuits. 1. MPS, MRD, MPP (Stack push down, stack read and stack popup) [Structured ladder] Y002 X004...
  • Page 83 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.7 MPS, MRD, MPP Program example 1. Program example 1 (One stack) Only one stack is used in this example. [Structured ladder] [ ST ] Y000:= MPS(X000 AND X001) AND X002; X000 X001 X002...
  • Page 84 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.7 MPS, MRD, MPP 2. Program example 2 (One stack with AND (...) and OR (...) instructions) [Structured ladder] [ ST ] Y000:= MPS(X000) AND (X001 OR X002); X000 X001 Y000 Y001:= MRD(TRUE) AND ((X003 AND X004) OR (X005 AND X006));...
  • Page 85 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.7 MPS, MRD, MPP 4. Program example 4 (Four stacks) [Structured ladder] Y000 X000 X001 X002 X003 X004 Y001 Y002 Y003 Y004 [ ST ] Y000:= (((MPS(X000) AND MPS(X001)) AND MPS(X002)) AND MPS(X003)) AND X004; Y001:= MPP(TRUE);...
  • Page 86 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.8 INV 3U(C) 2N(C) 1N(C) 0(S) Outline INV instruction inverts the operation result up to just before INV instruction. 1. Format and operation, execution form Expression in each language Instruction Execution name...
  • Page 87 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.8 INV Function and operation explanation 1. INV(inverts the result of operations) [Structured ladder] Timing chart X000 X000 Y000 Y000 [ ST ] Operation result until just Operation result after INV before INV instruction instruction is executed Y000:= INV(X000)
  • Page 88 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.9 MEP, MEF MEP, MEF 3U(C) 2N(C) 1N(C) 0(S) Outline MEP and MEF commands are instructions that change the operation results to pulses so that device numbers do not have to be specified. 1) MEP The operation results up to the MEP instruction become conductive when the driving contacts turn ON from OFF.
  • Page 89 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.9 MEP, MEF Function and operation explanation 1. MEP(ON during rising edge of driving contacts results) [Structured ladder] Timing chart X000 X001 X000 X001 [ ST ] IF X000 AND X001 THEN MEP(TRUE);...
  • Page 90 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.10 SET, RST 5.10 SET, RST 3U(C) 2N(C) 1N(C) 0(S) Outline 1) Setting a bit device (SET instruction [holding operation]) When the command input turns ON, SET instruction sets to ON an output relay (Y), auxiliary relay (M), state relay (S) and bit specification of word device.
  • Page 91 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.10 SET, RST 3. Applicable devices Bit Devices Word Devices Others System Special Real Character System User Digit Specification Index Constant Pointer Instruction User Unit Number String X Y M T C S D .b KnX KnY KnM KnS T C D R U \G V Z Modifier "...
  • Page 92 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.10 SET, RST 2. When using word device (timer or counter) Use RST instruction to reset a counter or retentive type timer. 1) Program example of an internal counter C0 up-counts the number of turning ON from OFF at X011.
  • Page 93 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.10 SET, RST 3. Indexing Devices used in SET and RST instructions can be indexed with index registers (V, Z). (State relays (S), special auxiliary relays (M), 32-bit counters, "D .b" and word devices cannot be indexed.) This is applicable only to the FX and FX PLCs.
  • Page 94 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.11 PLS, PLF 5.11 PLS, PLF 3U(C) 2N(C) 1N(C) 0(S) Outline When PLS instruction is executed, an applicable device is activated during only one operation cycle after a drive input turns ON. When PLF instruction is executed, an applicable device is activated during only one operation cycle after a drive input turns OFF.
  • Page 95 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.11 PLS, PLF Function and operation explanation 1. PLS (rising edge differential output) [Structured ladder] [ ST ] timing chart X000 PLS(X000, M0); X000 ON during one operation cycle PLS instruction In the figure above, M0 is ON during only one operation cycle when X000 changes from OFF to ON.
  • Page 96 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.11 PLS, PLF Cautions 1) When write during RUN is completed for a circuit including an instruction for falling edge pulse (LDF, ANDF or ORF instruction), the instruction is not executed without regard to the ON/OFF status of the target device of the instruction for falling edge pulse.
  • Page 97 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.12 MC, MCR 5.12 MC, MCR 3U(C) 2N(C) 1N(C) 0(S) Outline When MC instruction is executed, the bus line (LD or LDI point) is moved to a position after MC contact. The bus line can be returned to the original position by MCR instruction.
  • Page 98 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.12 MC, MCR Function and operation explanation When MC instruction is executed, the bus line is moved to a position after MC contact. Drive instructions connected to the bus line after MC contact execute each operation only when MC instruction is executed, and do not execute the operation when MC instruction is not executed (the same operation with the contact OFF).
  • Page 99 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.12 MC, MCR Program examples 1. When the nesting structure is not adopted. [Structured ladder] X000 M100 M100 X001 Y000 X002 Y001 Return to the bus line. X003 When not adopting the nesting structure, use nesting M150 level "0"...
  • Page 100 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.12 MC, MCR 2. When the nesting structure is adopted. When using MC instructions inside MC instruction, increase the nesting level "N" in turn in the way "N0 → N1 →...
  • Page 101 FXCPU Structured Programming Manual 5 Basic Instruction (Basic & Applied Instruction) 5.13 END 5.13 3U(C) 2N(C) 1N(C) 0(S) Outline END instruction specifies the end of a program. (Do not write the END instruction in the middle of a program.) END instruction for ending a program and input/output processing and returning to 0 step is automatically written at the end of the program.
  • Page 102 FXCPU Structured Programming Manual 6 Step Ladder Instructions (Basic & Applied Instruction) 6.1 Step Ladder Step Ladder Instructions Step Ladder This chapter introduces the instructions of structured project that correspond to the MELSEC-LD step ladder instructions. 6.1.1 Outline In programs using step ladder instructions, a state relay S is assigned to each process based on machine operations, and input condition and output control are programmed as sequences connected to the state output.
  • Page 103 FXCPU Structured Programming Manual 6 Step Ladder Instructions (Basic & Applied Instruction) 6.1 Step Ladder • One state relay number can be used only once. Y030 Process of S31 When X001 turns ON, S32 turns ON and S31 X001 is automatically reset. Y030 Y032 Process...
  • Page 104 FXCPU Structured Programming Manual 6 Step Ladder Instructions (Basic & Applied Instruction) 6.1 Step Ladder • Special auxiliary relays For efficiently creating step ladder programs, it is necessary to use some special auxiliary relays. The table below shows major ones. Device Name Function and application...
  • Page 105 FXCPU Structured Programming Manual 6 Step Ladder Instructions (Basic & Applied Instruction) 6.1 Step Ladder • Output driving method It is required to include a LD or LDI instruction before the last OUT instruction in a state relay. Change such a circuit as shown below. Y001 Y002 X005...
  • Page 106 FXCPU Structured Programming Manual 6 Step Ladder Instructions (Basic & Applied Instruction) 6.1 Step Ladder • Example of selective recombination Do not use MPS, MRD, MPP, AND (…) and OR (…) instructions in a transfer processing program with branches and recombination. Even in a load driving circuit, MPS instructions cannot be used immediately after STL instructions.
  • Page 107 FXCPU Structured Programming Manual 6 Step Ladder Instructions (Basic & Applied Instruction) 6.1 Step Ladder • Example of parallel recombination Do not use MPS, MRD, MPP, AND (…) and OR (…) instructions in a transfer processing program with branches and recombination. Even in a load driving circuit, MPS instructions cannot be used immediately after STL instructions.
  • Page 108 FXCPU Structured Programming Manual 6 Step Ladder Instructions (Basic & Applied Instruction) 6.1 Step Ladder • Composition of branches and recombination When a recombination line is directly connected to a branch line (not by way of a state relay as shown below), it is recommended to provide a dummy state relay between the lines.
  • Page 109 FXCPU Structured Programming Manual 6 Step Ladder Instructions (Basic & Applied Instruction) 6.1 Step Ladder 4) Parallel recombination and selective branch X000 S103 X001 S103 X002...
  • Page 110 FXCPU Structured Programming Manual 6 Step Ladder Instructions (Basic & Applied Instruction) 6.1 Step Ladder 6.1.3 Program examples Examples of single flows 1. Example of flicker circuit • When the PLC mode is changed from STOP to RUN, the state relay S3 is driven by the initial pulse (M8002).
  • Page 111 FXCPU Structured Programming Manual 6 Step Ladder Instructions (Basic & Applied Instruction) 6.2 STL 3U(C) 2N(C) 1N(C) 0(S) Outline In programs using step ladder instructions, a state relay State S is assigned to each process based on machine operations, and input condition and output control are programmed as sequences connected to the state output.
  • Page 112 FXCPU Structured Programming Manual 6 Step Ladder Instructions (Basic & Applied Instruction) 6.3 RET 3U(C) 2N(C) 1N(C) 0(S) Outline RET instruction for step ladder programs is expressed as follows in each language. 1. Format and operation, execution form Expression in each language Instruction Execution Operation...
  • Page 113 FXCPU Structured Programming Manual 6 Step Ladder Instructions (Basic & Applied Instruction) 6.3 RET 4. Caution The following examples show how MELSEC-LD step ladders are expressed in the structured programs (structured ladder, ST). Reference: MELSEC-LD step ladder expression 1) When expressing step ladder (STL) 2) When expressing step ladder (STL) instructions in the coil format.
  • Page 114 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow Applied Instructions This chapter introduces the structured project instructions corresponding to the applied instructions for the simple project. → Q/FX Structured Programming Manual (Fundamentals) Program Flow 7.1.1 3U(C) 2N(C)
  • Page 115 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow Function and operation explanation 1. 16-bit operation(CJ, CJP) While the command input is ON, CJ or CJP instruction executes a program with a specified label (pointer number).
  • Page 116 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow Cautions 1) The FX , FX or FX PLC does not support the instructions of pulse operation type. To execute pulse operation, make the instruction execution condition pulse type. 2) The figure below shows programming of a label.
  • Page 117 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow 6) The pointer P63 specifies jump to END step. Do not program P63. If P63 is programmed, PLCs will display the error code 6507 (defective label definition) and stop. Label P 63 Do not program P63.
  • Page 118 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow Program examples In one operation cycle after X023 changes to ON from OFF, CJ P7 instruction becomes valid. By using this method, jump can be executed after all outputs between CJ P7 instruction and the label P7 turn OFF.
  • Page 119 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow CJ instruction and operations of contact and coil In the program example shown below, when X000 turns ON, the program execution jumps from CJ instruction in the first circuit to the label P8. While X000 is OFF, jump is executed. The program is sequentially executed from first step, and jumps from 11th circuit to the label 9.
  • Page 120 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow 2. Circuit example 2 for explaining operations (when only an RST instruction for timer or counter is jumped) When X011 turns ON while the RST instruction OUT_C for the counter C0 is operating (X010 is ON), the X012...
  • Page 121 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow Timing chart Jump operation by CJ instruction driven by X011 X012 Counter is reset. Current value of C0 X010 In the same operating cycle as the reset, the reset status of counter C0 is cleared.
  • Page 122 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow 7.1.2 CALL 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction calls and executes a program which should be processed commonly in a sequence program. This instruction saves the number of program steps, and achieves efficient program design. For creating a subroutine program, FEND and SRET instructions are required.
  • Page 123 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow Function and operation explanation 1. 16-bit operation While the command input is ON, CALL instruction is executed and the program execution jumps to a step with a label p.
  • Page 124 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow Program examples 1. Example of fundamental use (no nesting) CALL X000 Main program While X000 is ON, the program execution jumps to a step with the label P10. FEND Label P 10...
  • Page 125 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow Cautions on subroutines and interrupt routines This section explains cautions on creating programs in subroutines and interrupt routines. The explanation below is given for subroutines, but the situation also applies to interrupt routines. 1.
  • Page 126 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow 1) Example in which outputs are latched In the following program example, the counter C0 is provided to count X001. When X000 is input, the subroutine P0 is executed only in one scan, and then the counter is reset and Y007 is output. •...
  • Page 127 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow 2) Example for resetting held outputs (countermeasures) • Program examples CALLP X000 OUT_C X001 CCoil CValue X002 Y007 is reset at an arbitrary timing. Y007 FEND X000 M8001 The preceding RST C0 instruction...
  • Page 128 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow 7.1.3 SRET 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction returns the program execution from a subroutine to the main program. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 129 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow 7.1.4 IRET 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction returns the program execution from an interrupt routine to the main program. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 130 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow Cautions 1) Create a task for the interrupt program and the main program. 2) Use "Event" to specify the interrupt pointer to be used for the task for the interrupt program. →...
  • Page 131 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow Program examples [Structured ladder] Task for main program Interrupts are usually disabled in PLCs. Use EI instruction to enable interrupts. When X000 turns ON while the main program is executed,instructions after the interrupt routine pointer I001 are executed, and the OUT_C...
  • Page 132 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow 7.1.5 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction disables interrupts after interrupts were enabled by EI instruction. 1. Format and operation, execution form Expression in each language Instruction Execution Operation...
  • Page 133 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow 7.1.6 3U(C) 2N(C) 1N(C) 0(S) Outline Interrupts are usually disabled in PLCs. This instruction enables interrupts in PLCs. Use this instruction for using the input interrupt, timer interrupt and counter interrupt functions. 1.
  • Page 134 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow Cautions 1) Refer to the following items for the cautions on the interrupt program. → Refer to Section 7.1.4. 2) Use the EI instruction as follows when the FX , FX , FX , FX...
  • Page 135 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow 7.1.7 FEND 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction indicates the end of the main program. 1. Format and operation, execution form Expression in each language Instruction Execution Operation...
  • Page 136 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow 2. In the case of CALL instruction Main routine program CALL X011 Main routine program FEND Subroutine program I100 Interrupt routine program Cautions 1) The function FEND instruction is usually added automatically during compilation. It is not necessary to program the FEND instruction in the program block except when creating a subroutine.
  • Page 137 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow 7.1.8 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction refreshes the watchdog timer in a sequence program. 1. Format and operation, execution form Expression in each language Instruction Execution Operation...
  • Page 138 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow Cautions 1) The FX , FX or FX PLC does not support the pulse operation type instructions. To execute pulse operation, make the instruction execution condition pulse type. 2) A watchdog timer error may occur in the following cases.
  • Page 139 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow 3. When FOR/NEXT instruction is repeated many times Put WDT instruction between FOR and NEXT. K30000 Program NEXT...
  • Page 140 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow 7.1.9 3U(C) 2N(C) 1N(C) 0(S) Outline FOR instruction specifies the number of repetition of the loop between FOR and NEXT instructions. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 141 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow 7.1.10 NEXT 3U(C) 2N(C) 1N(C) 0(S) Outline FOR instruction specifies the number of repetition of the loop between FOR and NEXT instructions. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 142 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow Cautions FOR-NEXT loop can be nested up to 5 levels. level NEXT 2nd level level level level NEXT level NEXT NEXT NEXT NEXT Error 1) When FOR-NEXT loop is repeated many times, the operation cycle (D8010) is too long, and a watchdog timer error may occur.
  • Page 143 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.1 Program Flow Program examples 1. Program example with three FOR-NEXT loops The loop 3) is repeated 4 times. When the data value (current value) of D0Z (D4 when Z is "4") is "6", the loop 2) is X010 repeated 6 times.
  • Page 144 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Move and Compare 7.2.1 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction compares two values, and outputs the result (smaller, equal or larger) to bit devices (3 points).
  • Page 145 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare 3. Applicable devices Bit Devices Word Devices Others System Special Real Character Operand System User Digit Specification Index Constant Pointer User Unit Number String type X Y M T C S D .b KnX KnY KnM KnS T C D R U \G V Z Modifier "...
  • Page 146 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare 2. 32-bit operation(DCMP, DCMPP) The comparison value specified by and the comparison source specified by are compared with each other. According to the result (smaller, equal or larger), any of the three points of the devices specified turns on.
  • Page 147 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Program examples 1. When comparing present value of a counter [Structured ladder] X000 X000 K100 Var_CMP CN20 Y000 CN20 Turns ON in the case of K100 >...
  • Page 148 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare 7.2.2 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction compares two values (zone) with the comparison source, and outputs the result (upper, equal or lower) to bit devices (3 points). 1.
  • Page 149 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Function and operation explanation 1. 16-bit operation(ZCP, ZCPP) The lower comparison value specified by and the upper comparison value specified by compared with the contents of the comparison source specified by .
  • Page 150 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Cautions 1) Some restrictions to applicable devices 1:The FX and FX PLCs only are applicable. Not indexed (V,Z). 2:The FX , FX and FX PLCs only are applicable. 3:The FX and FX PLCs only are applicable.
  • Page 151 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare 7.2.3 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction transfers (copies) the contents of a device to another device. 1. Format and operation, execution form Expression in each language Instruction Execution Operation...
  • Page 152 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Function and operation explanation 1. 16-bit operation(MOV, MOVP) The contents of the transfer source specified by are transferred to the transfer destination specified by • While the command input is OFF, the transfer destination specified by does not change.
  • Page 153 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare 2. 32-bit operation(DMOV, DMOVP) The contents of the transfer source specified by are transferred to the transfer destination specified by • While the command input is OFF, the transfer destination specified by does not change.
  • Page 154 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Program examples 1. When reading the current value of a timer and counter [Structured ladder] [ ST ] MOV(X001,TN0,D20); X001 (Current value of T0) (D20) The operation is the same as a counter.
  • Page 155 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare 4. When transferring 32-bit data Be sure to use DMOV instruction for transferring an applied instruction (such as MUL) whose operation result is output in 32 bits, and for transferring a 32-bit numeric value or transferring the current value of a high speed counter (C235 to C255) which is a 32-bit device.
  • Page 156 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare 7.2.4 SMOV 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction distributes and composes data in units of digit (4 bits). 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 157 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Function and operation explanation 1. 16-bit operation(SMOV, SMOVP) The contents of the transfer source specified by and transfer destination specified by are converted into 4-digit BCD (0000 to 9999) respectively. "m2" digits starting from "m1"th digit are transferred (composed) to the transfer destination specified by starting from "n"th digit, converted into binary, and then stored to the transfer destination specified by...
  • Page 158 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Program examples The data on three-digit digital switches are composed, and stored as binary data to D2. [Structured ladder] (X020 to X027)2-digit BCD D 2(Binary) M8000 K2X020 (X000 to X003)1-digit BCD...
  • Page 159 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare 7.2.5 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction inverts data in units of bit, and then transfers (copies) the inverted data. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 160 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Function and operation explanation 1. 16-bit operation(CML, CMLP) Each bit of a device specified by is inverted (from 0 to 1 or from 1 to 0), and then transferred to the device specified by •...
  • Page 161 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Program examples 1. When receiving an inverted input The sequence program shown below can be written by CML instruction. X000 X000 X001 X001 X002 X002 X003 X003 [ ST ]...
  • Page 162 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare 7.2.6 BMOV 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction transfers (copies) a specified number of data at one time. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 163 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Function and operation explanation BMOV instruction transfers "n" points of data from the device specified by to the device specified by at one time. • If the device number range is exceeded, data is transferred within the possible range. Command input BMOV n points...
  • Page 164 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Cautions 1) The FX , FX and FX PLCs handle file registers as follows. BMOV instruction Read Write FX 0N FX U FX 2C FX U (V2.30 or earlier) 2) The FX PLC does not support the instructions of pulse operation type.
  • Page 165 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Function of transfer between file registers and data registers BMOV instruction has a special function to file registers (D1000 and later). The maximum number of file register differs from one PLC to another. This explanation here uses the FX and FX PLCs as examples.
  • Page 166 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare 2. Cautions on use 1) When updating the contents of a file register with a same number (same-number update mode), make sure that the file register number is equivalent between 2) When using file registers in the same-number update mode, make sure that the number of transfer points specified by "n"...
  • Page 167 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare 7.2.7 FMOV 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction transfers same data to specified number of devices. 1. Format and operation, execution form Expression in each language Instruction Execution Operation...
  • Page 168 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Function and operation explanation 1. 16-bit operation(FMOV, FMOVP) The data or contents of a device specified by are transferred to "n" devices starting from a device specified by •...
  • Page 169 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Cautions 1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the case of a simple project. Use a label to handle 32-bit data. A 32-bit counter can be specified directly as it is a 32-bit long device.
  • Page 170 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare 7.2.8 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction exchanges data between two devices. 1. Format and operation, execution form Expression in each language Instruction Execution Operation name form...
  • Page 171 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Function and operation explanation 1. 16-bit operation(XCH, XCHP) Data is exchanged between the device specified by and the device specified by Command input Data exchanged 1 Data exchanged 2 Before execution After execution...
  • Page 172 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare 7.2.9 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts binary (BIN) data into binary-coded decimal (BCD) data. Binary data is used in operations in PLCs. Use this instruction to display numeric values on the seven- segment display unit equipped with BCD decoder.
  • Page 173 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Function and operation explanation 1. 16-bit operation(BCD, BCDP) This instruction converts the binary (BIN) data specified by into binary-coded decimal (BCD) data, and transfers the converted BCD data to the device specified by •...
  • Page 174 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Extension function(FX and FX PLCs) The FX PLC of V2.30 or earlier does not support the extension function. When executing the instruction with M8023 ON, conversion takes place from binary float to decimal float. X000 M8023 DBCD...
  • Page 175 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Program examples 1. When the seven-segment display unit has 1 digit [Structured ladder] X000 K1Y000 [ ST ] BCD(X000, D0, K1Y000); 2. When the seven-segment display unit has 2 to 4 digits [Structured ladder] X000 K2Y000...
  • Page 176 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare 7.2.10 BIN 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts binary-coded decimal (BCD) data into binary (BIN) data. Use this instruction to convert a binary-coded decimal (BCD) value such as a value set by a digital switch into binary (BIN) data and to receive the converted binary data so that the data can be handled in operations in PLCs.
  • Page 177 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Function and operation explanation 1. 16-bit operation(BIN, BINP) This instruction converts the binary-coded decimal (BCD) data specified by into binary (BIN) data, and transfers the converted binary data to the device specified by •...
  • Page 178 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Extension function(FX and FX PLCs) The FX PLC of V2.30 or earlier does not support the extension function. When executing the instruction with M8023 ON, conversion takes place from binary-coded decimal float to binary float.
  • Page 179 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.2 Move and Compare Program examples 1. When the digital switch has 1 digit Structured ladder X000 K1X000 [ ST ] BIN(X000, K1X000, D0); MOV instruction can be used instead. Structured ladder X000 K1X000...
  • Page 180 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation Arithmetic and Logical Operation 7.3.1 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction executes addition by two values to obtain the result (A + B = C) →...
  • Page 181 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation Function and operation explanation 1. 16-bit operation(ADD, ADDP) The data specified by are added in the binary format, and the addition result is transferred to the device specified by Command input →...
  • Page 182 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation Extension function(FX and FX PLCs) The FX PLC of V2.30 or earlier does not support the extension function. When executing an instruction with M8023 ON, a binary float operation takes place. In this case, K, H and D are valid as the object device for and D is valid for The source data needs to be converted into binary float value in advance by FLT instruction.
  • Page 183 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation 7.3.2 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction executes subtraction using two values to obtain the result (A -B = C). → For the floating point subtraction instruction [DESUB], refer to Section 7.12.9. 1.
  • Page 184 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation 3. Applicable devices Bit Devices Word Devices Others System Special Real Character Operand System User Digit Specification Index Constant Pointer User Unit Number String type X Y M T C S D .b KnX KnY KnM KnS T C D R U \G...
  • Page 185 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation Related device 1. Relationship between the flag operation and the sign → For the flag operations, refer to Section 1.3.4. Device Name Description ON : When the operation result is 0 M8020 Zero OFF : When the operation result is not 0...
  • Page 186 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation Program examples 1. Difference between SUB instruction and DEC instruction caused by a program for subtracting "1" "1" is subtracted from the contents of D0 every time X001 turns ON from OFF. SUB instruction is similar to DECP instruction described later except the contents shown in the table below.
  • Page 187 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation 7.3.3 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction executes multiplication by two values to obtain the result (A × B = C). → For the floating point multiplication instruction [DEMUL], refer to Section 7.12.10. 1.
  • Page 188 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation Function and operation explanation 1. 16-bit operation(MUL, MULP) The data specified by is multiplied by data specified by in the binary format, and the multiplication result is transferred to 32-bit (double word) device specified by Command input Multiplication...
  • Page 189 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation 2. 32-bit operation(DMUL, DMULP) The data specified by is multiplied by the data specified by in the binary format, and the multiplication result is transferred to 64-bit (four word devices).
  • Page 190 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation Cautions 1) Some restrictions to applicable devices 1:The FX , FX and FX PLCs only are applicable. 2:The FX and FX PLCs only are applicable. 3:Available only for a 16-bit operation.
  • Page 191 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation 7.3.4 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction executes division by two values to obtain the result [A ÷ B =C...(remainder)]. → For the floating point division instruction [DEDIV], refer to Section 7.12.11. 1.
  • Page 192 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation Function and operation explanation 1. 16-bit operation(DIV, DIVP) The contents specified by indicates the dividend, the contents specified by indicates the divisor, the quotient and remainder are transferred to the device specified by Command input Dividend Divisor Quotient Remainder...
  • Page 193 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation Cautions 1) Some restrictions to applicable devices 1:The FX , FX and FX PLCs only are applicable. 2:The FX and FX PLCs only are applicable. 3:Available only for a 16-bit operation.
  • Page 194 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation 7.3.5 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction increments the data of a specified device by "1" (+1 addition). 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 195 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation Function and operation explanation 1. 16-bit operation(INC, INCP) The contents of the device specified by is incremented by "1", and the increment result is transferred to Command input +1 →...
  • Page 196 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation 7.3.6 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction decrements the data of a specified device by "1" (-1 addition). 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 197 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation Function and operation explanation 1. 16-bit operation(DEC, DECP) The contents of the device specified by are decremented by "1", and the decremented result is transferred to the device specified by Command input –...
  • Page 198 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation 7.3.7 WAND 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction executes the logical product (AND) operation of two numeric values. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 199 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation Function and operation explanation 1. 16-bit operation(WAND, WANDP) The logical product (AND) operation is executed to the contents specified by in units of bit, and the result is transferred to the device specified by Command input WAND...
  • Page 200 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation 7.3.8 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction executes the logical sum (OR) operation of two numeric values. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 201 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation Function and operation explanation 1. 16-bit operation(WOR, WORP) The logical sum (OR) operation is executed to the contents specified by in units of bit, and the result is transferred to the device specified by Command input ∨...
  • Page 202 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation 7.3.9 WXOR 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction executes the exclusive logical sum (XOR) operation of two numeric values. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 203 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation Function and operation explanation 1. 16-bit operation(WXOR, WXORP) The exclusive logical sum (XOR) operation is executed to the contents specified by in units of bit, and the result is transferred to the device specified by WXOR Command input...
  • Page 204 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation Program examples By combining WXOR and CML instructions, the exclusive logical sum not (XORNOT) operation can be executed. [Structured ladder] [ ST ] WXOR WXOR(X000, D10, D12, D14);...
  • Page 205 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation 7.3.10 NEG 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction obtains the 2's complement of a numeric value (by inverting each bit and adding "1"). A sign of a numeric value can be converted by this instruction.
  • Page 206 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation Function and operation explanation 1. 16-bit operation(NEG, NEGP) is inverted (0 → 1, 1 → 0), "1" is added, and then the result is stored Each bit of the device specified by in the original device.
  • Page 207 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation Program examples The program examples below are provided to obtain the absolute value of a negative binary value. 1. Obtaining the absolute value of a negative value using NEG instruction [Structured ladder] M8000 In BON (ON bit check) instruction, M0...
  • Page 208 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.3 Arithmetic and Logical Operation Negative value expression and absolute value (reference) In PLCs, a negative value is expressed in 2's complement. When the most significant bit is "1", it is a negative value, and its absolute value can be obtained by NEG instruction.
  • Page 209 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation Rotation and Shift Operation 7.4.1 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction shifts and rotates the bit information rightward by the specified number of bits without the carry flag.
  • Page 210 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation Function and operation explanation 1. 16-bit operation (ROR, RORP) "n" bits out of 16 bits of the device specified by are rotated rightward. Command input Number of bits Rightward rotation data to be rotated...
  • Page 211 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation Related device → For the carry flag use method, refer to Section 1.3.4. Device Name Description M8022 Carry Turns ON when the bit shifted last from the lowest position is "1". Cautions 1) Some restrictions to applicable devices 1:K4Y...
  • Page 212 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation 7.4.2 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction shifts and rotates the bit information leftward by the specified number of bits without the carry flag.
  • Page 213 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation Function and operation explanation 1. 16-bit operation (ROL, ROLP) "n" bits out of 16 bits of the device specified by are rotated leftward. Command input Leftward rotation data Number of bits to be rotated...
  • Page 214 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation Related device → For the carry flag use method, refer to Section 1.3.4. Device Name Description M8022 Carry Turns ON when the bit shifted last from the highest position is "1". Cautions 1) Some restrictions to applicable devices 1:K4Y...
  • Page 215 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation 7.4.3 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction shifts and rotates the bit information rightward by the specified number of bits together with the carry flag. 1.
  • Page 216 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation Function and operation explanation 1. 16-bit operation (RCR, RCRP) "n" bits out of 16 bits of the device specified by and 1 bit (carry flag M8022) are rotated rightward. Command input Rightward rotation data Number of bits...
  • Page 217 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation Related device → For the carry flag use method, refer to Section 1.3.4. Device Name Description M8022 Carry Turns ON when the bit shifted last from the lowest position is "1". Cautions 1) Some restrictions to applicable devices 1:K4Y...
  • Page 218 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation 7.4.4 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction shifts and rotates the bit information leftward by the specified number of bits together with the carry flag.
  • Page 219 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation Function and operation explanation 1. 16-bit operation (RCL, RCLP) "n" bits out of 16 bits of the device specified by and 1 bit (carry flag M8022) are rotated leftward. Command input Leftward rotation data Number of bits...
  • Page 220 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation Related device → For the carry flag use method, refer to Section 1.3.4. Device Name Description M8022 Carry Turns ON when the bit shifted last from the highest position is "1". Cautions 1) Some restrictions to applicable devices 1:K4Y...
  • Page 221 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation 7.4.5 SFTR 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction shifts bit devices of the specified bit length rightward by the specified number of bits. After shift, the bit device specified by is transferred by "n2"...
  • Page 222 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation Function and operation explanation 1. 16-bit operation (SFTR, SFTRP) For "n1" bits (shift register length) starting from the bit device specified by , "n2" bits are shifted rightward (1) and 2) shown below).
  • Page 223 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation 7.4.6 SFTL 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction shifts bit devices of the specified bit length leftward by the specified number of bits. After shift, the bit device specified by is transferred by "n2"...
  • Page 224 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation Function and operation explanation 1. 16-bit operation (SFTL, SFTLP) For "n1" bits (shift register length) starting from the bit device specified by , "n2" bits are shifted leftward (1) and 2) shown below).
  • Page 225 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation Program examples(Conditional stepping of 1-bit data) By setting X000 to X007 to ON in turn, Y000 to Y007 are activated in turn. If the order is wrong, activation is disabled. [Structured ladder] X000 M8046...
  • Page 226 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation 7.4.7 WSFR 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction shifts word devices with "n1" data length rightward by "n2" words. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 227 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation Function and operation explanation 1. 16-bit operation (WSFR, WSFRP) For "n1" word devices starting from the device specified by , "n2" words are shifted rightward (1) and 2) shown below) After shift, "n2"...
  • Page 228 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation Program examples 1. Shifting devices with digit specification [Structured ladder] WSFR X000 K1Y000 K1X000 Specify a same digit for devices with digit specification. Make sure that the number of digits is equivalent.(Kn X007 X006 X005 X004 X003 X002 X001 X000 Y017 Y016 Y015 Y014 Y013 Y012 Y011 Y010 Y007 Y006 Y005 Y004 Y003 Y002 Y001 Y000 [ ST ]...
  • Page 229 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation 7.4.8 WSFL 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction shifts the word data information leftward by the specified number of words. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 230 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation Function and operation explanation 1. 16-bit operation (WSFL, WSFLP) For "n1" word devices starting from the device specified by , "n2" words are shifted leftward (1) and 2) shown below).
  • Page 231 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation Program examples 1. Shifting devices with digit specification [Structured ladder] X000 WSFL K1Y000 K1X000 Specify a same digit for devices with digit specification. Make sure that the number of digits is equivalent.(Kn X007 X006 X005 X004 X003 X002 X001 X000 Y017 Y016 Y015 Y014 Y013 Y012 Y011 Y010 Y007 Y006 Y005 Y004 Y003 Y002 Y001 Y000 [ ST ]...
  • Page 232 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation 7.4.9 SFWR 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction writes data for first-in first-out (FIFO) and first-in last-out (FILO) control. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 233 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation Function and operation explanation 1. 16-bit operation (SFWR, SFWRP) The contents of the device specified by are written to "n-1" devices from the device specified by and "1"...
  • Page 234 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation Program examples 1. Example of first-in first-out control → For a program example of FILO, refer to Section 7.21.3. In the example below, the shift write (SFWR) and shift read (SFRD) instructions are used. 1) Contents of operation - In this circuit example, a product number to be taken out now is output according to "first-in first-out"...
  • Page 235 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation 7.4.10 SFRD 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction reads data for first-in first-out control. 1. Format and operation, execution form Expression in each language Instruction Execution Operation...
  • Page 236 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.4 Rotation and Shift Operation Function and operation explanation 1. 16-bit operation (SFRD, SFRDP) The data of the device specified by [ +1] written in turn by SFWR instruction is transferred (read) to the device specified by , and "n-1"...
  • Page 237 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation Data Operation 7.5.1 ZRST 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction resets devices located in a zone between two specified devices at one time. Use this instruction for restarting operation from the beginning after pause or after resetting control data. 1.
  • Page 238 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation Function and operation explanation 1. 16-bit operation (ZRST, ZRSTP) Same type of devices specified by are reset at one time. When the devices specified by are bit devices "OFF (reset)"...
  • Page 239 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation Related instructions 1. RST As an independent reset instruction for devices, RST instruction can be used for bit devices (Y, M and S) and word devices (T, C, D and R). X001 2.
  • Page 240 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation Program examples 1. When using devices in the latch area as non-latch type devices When the power of the PLC is turned ON or when the PLC mode is changed to RUN, the specified ranges of bit devices and word devices are reset at one time.
  • Page 241 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation 7.5.2 DECO 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts numeric data into ON bit. A bit number which is set to ON by this instruction indicates a numeric value 1.
  • Page 242 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation Function and operation explanation 1. 16-bit operation (DECO, DECOP) One bit among the devices specified by [ -1] is set to ON according to the value of the device specified by is a bit device (1 ≤...
  • Page 243 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation Cautions 1) The FX , FX or FX PLC does not support the instructions of pulse operation type. To execute pulse operation, make the instruction execution condition pulse type. 2) While the command input is OFF, the instruction is not executed.
  • Page 244 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation 2. Turning ON the bit out of word devices according to the contents of bit devices The value expressed by X000 to X002 is decoded to D0 (X000 and X001 are ON, and X002 is OFF in this example).
  • Page 245 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation 7.5.3 ENCO 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction obtains positions in which bits are ON in data. 1. Format and operation, execution form Expression in each language Instruction Execution Operation...
  • Page 246 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation Function and operation explanation 1. 16-bit operation (ENCO, ENCOP) The 2 bit of the data specified by is encoded, and the result value is stored to the device specified by This instruction converts data into binary data according to a bit position in the ON status.
  • Page 247 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation Cautions 1) The FX , FX or FX PLC does not support the instructions of pulse operation type. To execute pulse operation, make the instruction execution condition pulse type. 2) When two or more bits are ON in the data specified by , the low-order side is ignored, and only the ON position on the high-order side is encoded.
  • Page 248 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation 7.5.4 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction counts the number of "1" (ON) bits in the data of a specified device. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 249 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation Function and operation explanation 1. 16-bit operation (SUM ,SUMP) The number of bits in the ON status in the device specified by is counted, and stored to the device specified by •...
  • Page 250 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation 3. Operation result of the device specified by according to the value specified by 16-bit operation) M8020 Bit device Word device Zero flag b15 b14 b13 b12 b11 b10 Decimal Hexadecimal 0000 0001...
  • Page 251 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation 7.5.5 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction checks whether a specified bit position in a device is ON or OFF. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 252 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation Function and operation explanation 1. 16-bit operation(BON, BONP) The status (ON or OFF) of the bit "n" in the device specified by is output to the device specified by [When the bit "n"...
  • Page 253 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation Program examples When the bit 9 (n=9) in D10 is "1" (ON), M0 is set to "1" (ON). [Structured ladder] [ ST ] BON(X000, D10, K9, M0); X000 D 10 M 0=ON...
  • Page 254 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation 7.5.6 MEAN 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction obtains the mean value of data. 1. Format and operation, execution form Expression in each language Instruction Execution Operation name...
  • Page 255 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation Function and operation explanation 1. 16-bit operation (MEAN, MEANP) The mean value of "n" 16-bit data from the device specified by is stored to the device specified by •...
  • Page 256 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation 7.5.7 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction sets a state relay as an annunciator. 1. Format and operation, execution form Expression in each language Instruction Execution Operation name...
  • Page 257 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation Related device Device Name Description M8049 Enable annunciator When M8049 is set to ON, M8048 and D8049 are valid. M8048 Annunciator ON When M8049 is ON and one of the state relays S900 to S999 is ON, M8048 turns ON. Smallest state relay D8049 Among S900 to S999, the smallest state relay number in the ON status is stored.
  • Page 258 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation 7.5.8 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction resets an annunciator in the ON status with the smallest number. 1. Format and operation, execution form Expression in each language Instruction Execution Operation...
  • Page 259 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation Cautions 1. Execution in each operation cycle • When ANR instruction is used, annunciators in the ON status are reset in turn in each operation cycle. •...
  • Page 260 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation 7.5.9 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction obtains the square root. The DESQR instruction obtains the square root in floating point operation. → For DESQR instruction, refer to Section 7.12.15. 1.
  • Page 261 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation Function and operation explanation 1. 16-bit operation (SQR, SQRP) The square root of the data stored in the device specified by is calculated, and stored to the device specified by Command input Root data...
  • Page 262 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation 7.5.10 FLT 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts a binary integer into a binary floating point (real number). 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 263 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation Function and operation explanation 1. 16-bit operation (FLT, FLTP) The binary integer data of the device specified by is converted into binary floating point (real number), and stored to the device specified by Command input Binary integer Binary floating point (real number)
  • Page 264 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation Program examples 1. Arithmetic operations by binary floating point operations The sequence program shown below is constructed as follows: 1) Calculation example × K34.5 (D 11, D 10) Binary floating point (D 0) (X017 to X010) operation...
  • Page 265 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.5 Data Operation 2) Program [Structured ladder] M8000 (D 0) (D21, D20) Binary floating point operation Var_FLT1 (X017 to X010) (D22) K2X010 (D22) (D25, D24) Binary floating point operation Var_FLT2 DEDIV K345...
  • Page 266 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing High Speed Processing 7.6.1 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction immediately outputs the latest input (X) information or the current output (Y) operation result in the middle of a sequence program operation.
  • Page 267 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Function and operation explanation 1. 16-bit operation(REF, REFP) 1) When refreshing outputs (Y) "n" points are refreshed from the output of the device specified by .
  • Page 268 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Cautions 1) When setting the specified head device number "d", make sure that the least significant digit number is "0" such as "X000, X010, X020, ..." or "Y000, Y010, Y020, ...". 2) The FX , FX or FX...
  • Page 269 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 2. Output response time After the REF instruction is executed, the output (Y) sets the output signal to ON after the response time shown below. →...
  • Page 270 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 7.6.2 REFF 3U(C) 2N(C) 1N(C) 0(S) Outline The digital input filter time of the inputs can be changed using this instruction or D8020. Using this instruction, the status of inputs can be refreshed at an arbitrary step in the program for the specified input filter time, and then transferred to the image memory.
  • Page 271 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing • When the input turns ON "n × 1 ms" before the instruction is executed, the input image memory is set to ON. When the input turns OFF "n × 1 ms" before the instruction is executed, the input image memory is set to OFF.
  • Page 272 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Program examples 1. Relationship between the program and the filter time Structured ladder X010 REFF When X010 is ON The image memory is refreshed Input processing with an input filter of 1 ms.
  • Page 273 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 2. Instruction in which the digital filter is automatically changed Regardless of the change in the filter time executed by the REFF instruction, when the following functions and instructions are executed, the input filter value is automatically changed (as shown in the caution).
  • Page 274 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 7.6.3 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction reads matrix input as 8-point input × "n" output (transistor) in the time division method. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 275 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Function and operation explanation 1. 16-bit operation(MTR) An input signal of 8 points × "n" columns is controlled in the time division method using 8 inputs of the device specified by and "n"...
  • Page 276 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Program examples n = Three outputs (Y020, Y021 and Y022) are set to ON in turn repeatedly. Every time an output is set to ON, eight inputs in the 1st, 2nd and 3rd columns are received in turn repeatedly, and stored to M30 to M37, M40 to M47, and M50 to M57 respectively.
  • Page 277 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Operation and cautions for MTR instruction 1. Command input 1) Setting the command input to normally ON For the MTR instruction, set the command input to normally ON. (Normally ON) X020 Y040...
  • Page 278 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 7.6.4 DHSCS 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction compares a value counted by a high speed counter with a specified value at each count, and immediately sets an external output (Y) if the two values are equivalent each other.
  • Page 279 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Function and operation explanation 1. 32-bit operation (DHSCS) When the current value of a high speed counter of the device specified by becomes the comparison value of the device specified by (for example, when the current value changes from "199"...
  • Page 280 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Cautions 1. Selection of the counter comparison method When the DHSCS instruction is used, the maximum frequency and total frequency of the high speed counter are affected.
  • Page 281 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 4. Specifying input and output variables When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the case of a simple project.
  • Page 282 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Common cautions on using instructions for high speed counter DHSCS, DHSCR and DHSZ instructions are provided for high speed counters. This section explains common cautions for these instructions. 1.
  • Page 283 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 5. Reset operation by an external terminal [M8025 : DHSC (external reset) mode] For a high speed counter equipped with an external reset terminal (R) such as C241, an instruction is executed and the comparison result is output at the rising edge of the reset input signal.
  • Page 284 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 6. Priority order in operations among DHSCS, DHSCR and DHSZ instructions for the same high speed counter when the same comparison value is used. 1) FX and FX PLCs When the same comparison value is used for the same high speed counter in DHSCS, DHSCR and...
  • Page 285 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Operation of FX and FX PLCs *1. To change the comparison results by the instructions (1) to (3) Current and (5) in the previous page, change the comparison value value "K500"...
  • Page 286 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 7.6.5 DHSCR 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction compares the value counted by a high speed counter with a specified value at each count, and immediately resets an external output (Y) when both values become equivalent to each other.
  • Page 287 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Function and operation explanation 1. 32-bit operation (DHSCR) When the current value of the high speed counter of the device specified by becomes the comparison value of the device specified by (for example, when the current value changes from "199"...
  • Page 288 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Cautions 1. Selection of the counter comparison method When the DHSCS instruction is used, the maximum frequency and total frequency of the high speed counter are affected.
  • Page 289 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 4. Specifying input and output variables When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the case of a simple project.
  • Page 290 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 7.6.6 DHSZ 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction compares the current value of a high speed counter with two values (one zone), and outputs the comparison result to three bit devices (refresh).
  • Page 291 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Function and operation explanation 1. 32-bit operation (DHSZ) The current value of the high speed counter of the device specified by is compared with two comparison points (comparison value 1 and comparison value 2).
  • Page 292 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Related instruction The following instructions can be combined with high speed counters. Instruction Instruction name DHSCS High speed counter set DHSCR High speed counter reset DHSZ High speed counter zone compare DHCMOV...
  • Page 293 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing For FX , FX , FX , FX , FX , FX , FX , FX , FX , FX and FX PLCs LDD> Y010 Label 3 Label 4 LDD<=...
  • Page 294 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 8. Reset operation by an external terminal → Refer to caution 5 in "Common cautions on using instructions for high speed counter" which is described in Section 7.6.4. 9.
  • Page 295 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Program examples [Structured ladder] X010 CC235 ZRST Y010 Y010 to Y012 are reset. Y012 M8000 OUT_C_32 CC235 CCoil monitor CValue K999 Pulse input: X000 Immediately after start, comparison is executed only once. DZCPP M8000 >...
  • Page 296 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Timing chart In the part 1) in the timing chart, Y010 remains OFF if the current value of a high speed counter (C235 in the example below) is "0"...
  • Page 297 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Table high speed comparison mode (M8130) This section explains the table high speed comparison mode (high speed pattern output) of the DHSZ instruction. When two or more outputs should be activated at one time, use the DHSCT instruction which can change up to 16 outputs.
  • Page 298 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Comparison table Comparison data Output (Y) SET/RST Table counter (D8130) (32 bits) number ↓ ↓ ↓ ↓ Repeated from "0" 1) Specify the head number for the comparison table as ×...
  • Page 299 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 2. Operation DMOV M8002 Comparison data Label 2 Label 1 Output (Y) number D202 Output is set or reset K1: Output is set. D203 DMOV Comparison data Label 4 Label 3...
  • Page 300 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing OUT_C_32 Command input CC251 CCoil CValue K2,147,483,647 DHSZ Label 11 M8130 Label 12 Table high speed comparison mode CC251 Reset Command input CC251 Y011 *1. This defines K123. *2.
  • Page 301 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Comparison table Comparison Output (Y) Current value SET/RST Table counter data number of C251 D201, D200 D 202 D 203 A program ↓ K123 to reset the D205, D204 D 206 D 207...
  • Page 302 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Frequency control mode (DHSZ, DPLSY) (M8132) When the special auxiliary relay M8132 for declaring the frequency control mode is specified as in the DHSZ instruction, the special function shown below is provided if DPLSY instruction is combined. At this time, only a data register D can be specified as , and a constant K or H can be specified as The available range is limited to "1 ≤...
  • Page 303 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Command input DMOVP Comparison data Label 2 Label 1 *1. This defines K20. DMOVP *2. This defines D300. Frequency Label 4 Label 3 *3. This defines K300. DMOVP *4.
  • Page 304 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Output pulse characteristics Output pulse Frequency (Hz) Current value of C251 1) Write prescribed data in advance to data registers constructing the table as shown in this program example.
  • Page 305 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 7.6.7 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction counts the input pulse for a specified period of time as interrupt input. The function of this instruction varies depending on the version. 1.
  • Page 306 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Function and operation explanation 1. 16-bit operation (SPD) The input pulse specified by is counted only for the period of "time specified by multiplied by 1 ms." The measured value is stored in , the current value is stored in +1, and the remaining time is stored...
  • Page 307 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 2. 32-bit operation (DSPD) [FX , FX Ver.2.20 or later] The input pulse specified by is counted only for the period of "time specified by multiplied by 1 ms."...
  • Page 308 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Cautions 1. Input specifications of the input specified by can specify the following ranges. , FX , and FX PLCs: X000 to X007 , FX , FX , FX and FX...
  • Page 309 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 7.6.8 PLSY 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction generates a pulse signal. 1. Format and operation, execution form Expression in each language Instruction Execution Operation name form...
  • Page 310 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Function and operation explanation 1. 16-bit operation (PLSY) A pulse train of frequency specified by is output in the quantity specified by from the output (Y) specified by Command Pulse quantity...
  • Page 311 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 2. Monitoring the current number of generated pulses The number of pulses output from Y000 or Y001 is stored in the following special data resistors. Device Description Contents of data...
  • Page 312 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Cautions 1. When a word device is specified as When the value of the word device is changed while the instruction is executed, the following operation results.
  • Page 313 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 7. Handling of pulse output terminals in the main units The outputs Y000 and Y001 are the high speed response type. W h e n u s i n g a p u l s e o u t p u t i n s t r u c t i o n o r positioning instruction, adjust the load current of the open collector transistor output.
  • Page 314 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 8. Cautions on using special high speed output adapters (FX PLC) 1) Outputs of special high speed output adapters work as differential line drivers. 2) Set the pulse output type setting switch in a special high speed output adapter to the "pulse train + direction"...
  • Page 315 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Program examples (When outputting pulses without any limitation) When the device specified by is set to K0, pulses are output without any limitation. [Structured ladder] No limitation (K0) Command DPLSY...
  • Page 316 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 7.6.9 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction outputs pulses with a specified period and ON duration. 1. Format and operation, execution form Expression in each language Instruction Execution Operation...
  • Page 317 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Function and operation explanation 1. 16-bit operation (PWM) Pulses whose ON pulse width (ms) is specified by are output in periods (ms) specified by to the device specified by Command input...
  • Page 318 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 3. Restrictions to target devices 1: Refer to item 1 of "Cautions". 2: Applicable only to the FX , FX and FX PLCs. 3: Applicable only to the FX and FX PLCs.
  • Page 319 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 7.6.10 PLSR 3U(C) 2N(C) 1N(C) 0(S) Outline This pulse output instruction has the acceleration/deceleration function. 1. Format and operation, execution form Expression in each language Instruction Execution Operation...
  • Page 320 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Function and operation explanation 1. 16-bit operation (PLSR) Pulses are output from output (Y) specified by by the number of output pulses specified by with acceleration/deceleration to the maximum frequency specified by over the time (ms) specified by Pulse frequency (Hz)
  • Page 321 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing Related devices 1. Instruction execution complete flag Device Name Description OFF :The command input is OFF, or pulses are being output. (This flag does not turn ON if the pulse Instruction execution output is interrupted in the middle of output.) M8029...
  • Page 322 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 2. Total number of output pulses Set the total number of output pulses specified by as follows. • For FX and FX PLCs : 16-bit instruction→1 to 32,767PLS 32-bit instruction→1 to 2,147,483,647PLS •...
  • Page 323 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.6 High Speed Processing 6. Restrictions to target devices 1: Refer to item 4 in "Cautions". 2: Applicable only to the FX , FX and FX PLCs. 3: Applicable only to the FX and FX PLCs.
  • Page 324 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction Handy Instruction 7.7.1 3U(C) 2N(C) 1N(C) 0(S) Outline This is a command for controlling the initial state and special auxiliary relay automatically in a program by stepladder.
  • Page 325 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction Function and operation explanation Command input Beginning bit device Minimum state of operation mode Maximum state changeover switch • In , designate beginning input of operation mode. Selection switch for operation mode occupies 8 points from the beginning device designated in , and the following switch functions are assigned individually.
  • Page 326 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction Cautions 1. Devices designated in and switches to be used Not all mode selection switches are used. Vacant numbers (not usable in other applications) are designated in switches not in use. 2.
  • Page 327 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction IST command equivalent circuit Detail of special auxiliary relay (M) or initial state (S0 to S9) controlled automatically by IST command is as shown in the following equivalent circuit. (Read as reference knowledge.) This equivalent circuit cannot create program.
  • Page 328 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction IST command introduction examples (examples of work transfer mechanism) 1. Operation mode Mechanism for transferring the work from Stepping X022 point A to point B by robot hand Return home Return to...
  • Page 329 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction 3. Assignment of mode select inputs In order to use IST command, inputs of the following serial numbers must be assigned in the mode inputs. If the numbers are not serial, or modes are partly omitted, the array is modified by using auxiliary relays as shown below, which is used as the mode designation beginning input.
  • Page 330 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction 4. Special auxiliary relays for IST command(M) Auxiliary relays (M) used in IST command are divided into those controlled automatically by the command depending on the circumstances, and others that must be controlled by the program depending on the operation preparation or purpose of control.
  • Page 331 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction 5. Program examples 1) Circuit diagram In the sequence circuit shown below, other portions than the shaded area are routine circuits. You can program the shaded area circuit according to the content of the control. a) Initial circuit During operation of the machine, the operation can be changed over freely within the "automatic operation' mode (stepping/one-cycle/continuous).
  • Page 332 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction c) Return to home position Program is not required when return home mode is not available. However, before automatic operation, return home end M8043 must be once set. [Structured ladder] STL(TRUE, S1);...
  • Page 333 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction d) Automatic operation (stepping/one-cycle/continuous) [Structured ladder] Process of S2 M8041 M8044 Transfer Home position start condition Descend Y000 Process of S20 X001 Lower limit Clamp Y001 Process of S21 OUT_T TCoil...
  • Page 334 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction [Structured ladder] Right move Y003 Process of S23 X003 Right limit Process of S24 Descend Y000 X001 Lower limit Unclamp Y001 Process of S25 OUT_T TCoil TValue Ascend Process of S26...
  • Page 335 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction [ ST ] STL(TRUE, S2); Process of S2 IF(M8041 AND M8044) THEN SET(TRUE, S20); STL(TRUE, S20); OUT(TRUE, Y000); Process of S20 SET(X001, S21); STL(TRUE, S21); SET(TRUE, Y001); Process of S21 OUT_T(TRUE, TC0, K10);...
  • Page 336 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction 7.7.2 3U(C) 2N(C) 1N(C) 0(S) Outline This is a command for searching same data and maximum value, minimum value from the table of data. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 337 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction 3. Applicable devices Bit Devices Word Devices Others System Special Cons Real Character Operand System user Digit designation Index Pointer user unit tant number string type X Y M T C S D .b KnX KnY KnM KnS T C D U \G V Z Modifier K H...
  • Page 338 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction 2) Operation examples a) Examples of composition of search result table and data Search result Value of Value of Searched device Position of Maximum Coincide Minimum searched data comparative data data...
  • Page 339 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction 2) Operation examples a) Examples of composition of search result table and data Search result Value of Searched device Comparative Position searched data Maximum Coincide Minimum of data data (ex.)
  • Page 340 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction 7.7.3 ABSD 3U(C) 2N(C) 1N(C) 0(S) Outline This is a command for creating multiple output patterns corresponding to the present value of the counter. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 341 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction IST command equivalent circuit 1. 16-bit operation(ABSD) This is an example for explaining the ON/OFF control of the output by one revolution of table (0 to 360 degrees).
  • Page 342 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction 2. 32-bit operation(DABSD) This is an example for explaining the ON/OFF control of the output by one revolution of table (0 to 360 degrees). (Rotation angle signal one degree per pulse) Data table (occupying n lines ×...
  • Page 343 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction Cautions 1. Designation of high speed counter DABSD command can designate a high speed counter in the device designated in In this case, as compared with the counter present value, the output pattern may have a response delay due to scan cycle.
  • Page 344 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction 7.7.4 INCD 3U(C) 2N(C) 1N(C) 0(S) Outline This is a command for creating multiple output patterns by using a pair of counters. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 345 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction Function and operation explanation 1. 16-bit operation(INCD) Data table (n lines × 1 point occupied) of n lines from the device designated in is compared with the present value of the counter of the device designated in , and by resetting when coinciding, outputs are sequentially controlled to be ON/OFF.
  • Page 346 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction 2) M0 output is turned ON when command contact is turned ON. 3) Output (M0) is reset when the present value of C0 reaches comparative value D300, and the count value of the process counter C1 is incremented by +1, and the present value of the counter C0 is also reset.
  • Page 347 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction 7.7.5 TTMR 3U(C) 2N(C) 1N(C) 0(S) Outline This is a command for measuring the ON duration of TTMR command. This is used when adjusting the timer setting time by pushbutton. 1.
  • Page 348 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction Function and operation explanation 1. 16-bit operation(TTMR) The pushing duration of command input (pushbutton) is measured in the unit of seconds, and is multiplied by multiplying factor (10 ), and transferred to the device designated in Command TTMR...
  • Page 349 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction Program examples Write teaching time in ten data registers. Set values should be preliminarily written in D400 to D409. [Structured ladder] X020 OUT_T TCoil TValue D400 X021 OUT_T Ten timers desired to be set...
  • Page 350 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction 7.7.6 STMR 3U(C) 2N(C) 1N(C) 0(S) Outline This is the command for creating the off-delay timer, one-shot timer or flicker timer easily. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 351 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction Function and operation explanation 1. 16-bit operation(STMR) The value designated in m is determined as the set value for the timer of the device designated in , and is issued to four points from the device designated in Create the program depending on the application by referring to the following example.
  • Page 352 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction Cautions 1. Handling of designated timer The timer number designated by this command cannot be used in overlap with other general circuit (OUT command, etc.). If overlapped, the timer does not operate correctly. 2.
  • Page 353 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction 7.7.7 3U(C) 2N(C) 1N(C) 0(S) Outline This is the command for inverting the bit device (ON to OFF, OFF to ON) when the input is turned ON. 1.
  • Page 354 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction Function and operation explanation 1. 16-bit operation(ALT, ALTP) Alternate output (one stage) Every time the command input is changed from OFF to ON, the bit device designated in is inverted from ON to OFF, from OFF to ON.
  • Page 355 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction 2. Flicker operation 1) When the input X006 is turned ON, the contact of timer T2 operates momentarily in every 5 seconds. 2) Every time the contact of T2 is turned ON, the output Y007 is alternately turned ON/OFF. [Structured ladder] OUT_T X006...
  • Page 356 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction 7.7.8 RAMP 3U(C) 2N(C) 1N(C) 0(S) Outline This is a command for obtaining data changing n times when designated between the beginning (initial value) and the end (target value). 1.
  • Page 357 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction Function and operation explanation 1. 16-bit operation(RAMP) The starting value and the desired end value are designated in , and when the command input is turned ON, the value equally divided by the number of times designated in n is added to sequentially in every operation period, and the sum is stored in the device designated in This command and the analog output are combined, and the cushion start/stop command can be issued.
  • Page 358 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction 2. Operation of mode flag (M8026) In FX , FX , FX , FX , FX , FX (V1.20 or higher) PLCs, by ON/OFF switching of mode flag M8026, the content of +1 is changed as follows.
  • Page 359 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction 7.7.9 ROTC 3U(C) 2N(C) 1N(C) 0(S) Outline This is a command suited for turning the table by a shortcut route depending on the demanding window when putting on or taking out articles on the rotary table.
  • Page 360 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction Function and operation explanation 1. 16-bit operation(ROTC) As shown below, in order to put on or take out articles on the rotary table divided into m1 sections (=10), depending on the demanding window, the table is controlled and moved by a shortcut route in the condition designated in m2 or ROTC...
  • Page 361 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction Operation condition The condition necessary for using this command is as shown in the example below. 1) Rotation detection signal: X→ a) Please install two-phase switch (X000, X001) for detecting normal rotation/reverse rotation of table, and switch X002 for operating when article number 0 comes to window number 0.
  • Page 362 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction 7.7.10 SORT 3U(C) 2N(C) 1N(C) 0(S) Outline This command reshuffles the data table composed of data (columns) and group data (rows) in the ascending order in column unit on the basis of designated group data (rows). In this command, the group data (rows) is stored in continuous devices.
  • Page 363 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction Function and operation explanation 1. 16-bit operation(SORT) This command reshuffles the data table (reshuffling origin) composed of (m1×m2) points from the device designated in in the ascending order in data columns on the basis of n rows of group data, and stores in the data table (after reshuffling) of (m1×m2) points from the device designated in →...
  • Page 364 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.7 Handy Instruction 1) Reshuffling results when command is executed in n=K2 (row number 2) number Column Management Height Weight number number 2) Reshuffling results when command is executed in n=K3 (row number 3) number Column Management...
  • Page 365 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device External FX I/O Device 7.8.1 3U(C) 2N(C) 1N(C) 0(S) Outline This is a command for setting data in the timer or counter by the input of numeric keys 0 to 9. 1.
  • Page 366 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device Function and operation explanation 1. 16-bit operation(TKY) By pressing key from the input for connecting the numeric keys (device designated in ), the entered numerical value is stored in the device designated in , and the key pushing information and key sense output are issued to the device designated in...
  • Page 367 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device 2. 32-bit operation(DTKY) By pressing key from the input for connecting the numeric keys (device designated in ), the entered numerical value is stored in the device designated in , and the key pushing information and key sense output are issued to the device designated in 1) Entered numerical value...
  • Page 368 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device Program examples This is an explanation of an example in which the input X000 is the beginning, and numeric keys 0 to 9 are connected.
  • Page 369 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device 7.8.2 3U(C) 2N(C) 1N(C) 0(S) Outline This is a command for setting the input data of numerical value (0 to 9) or operation condition (function keys A to F), by the input of keys from 0 to F (16 keys).
  • Page 370 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device Function and operation explanation 1. 16-bit operation(HKY) The numerical value scanned by the signals of the input for connecting 16 keys (0 to F) (device designated in ) and the row output (device designated in ) and by pressing keys 0 to 9 is stored in the device designated in...
  • Page 371 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device Extension function When the extension function is validated by turning ON the M8167, the hexadecimal key pushing data of 0 to F is stored in BIN. Except for the following, this is same as the "function and operation explanation"...
  • Page 372 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device Cautions 1. Limit of number of times of use of command Only one of HKY command and DHKY command can be used in the program. If desired to use plural times, you can program by the index modifier (V, Z) function.
  • Page 373 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device Program examples [ST] [Structured ladder] HKY(X004, X000, Y000, D0, M0); X004 X000 Y000 The wiring diagram below is an example of basic unit (sync input/sync output) of FX series.
  • Page 374 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device 7.8.3 3U(C) 2N(C) 1N(C) 0(S) Outline This is a command for reading in the set value of digital switch. You can read in the data of 4 digits and 1 set (n=K1), or 4 digits and 2 sets (n=K2). 1.
  • Page 375 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device Function and operation explanation 1. 16-bit operation(DSW) The value of digital switch connected to the device designated in is processed by time division (entered sequentially from the first digit by output signals at 100 ms intervals), and stored in the device designated in Command input Beginning device for...
  • Page 376 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device Program examples This is an example of explaining connection of digital switch starting from the input X010 and starting from the digit designation output Y010. 1.
  • Page 377 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device 4. Method of using by relay output type You can also use the relay output type PLC by providing with "digital switch reading input." When pushbutton (X000) is pressed, the DSW performs a series of operations.
  • Page 378 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device 7.8.4 SEGD 3U(C) 2N(C) 1N(C) 0(S) Outline This is a command for lighting up the 7-segement display unit (1 digit) by decoding the data. 1.
  • Page 379 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device Function and operation explanation 1. 16-bit operation(SEGD, SEGDP) 0 to F (hexadecimal) of lower 4 bits (1 digit) of the device designated in are decoded into 7-segment display data, and stored in lower 8 bits of the device designated in SEGD Command input...
  • Page 380 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device 7.8.5 SEGL 3U(C) 2N(C) 1N(C) 0(S) Outline This is a command for controlling the 7-segment display unit with latch of 4 digits and 1 set or 4 digits and 2 sets.
  • Page 381 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device When using 4 digits and 1 set(n=K0 to K3) → As for selection of "n", see the second item below. 1) Data and strobe signal The 4-digit numerical value of is converted from BIN to BCD, and is issued sequentially by time division digit by digit from...
  • Page 382 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device 3) Connection example of 7-segment display unit The following diagram show an example of FX series basic unit (sync output). As for the actual wiring, see the manual of the PLC. (transistor output) First set Second set...
  • Page 383 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device Selection procedure of 7-segment display unit You can select the 7-segment display unit depending on the electrical content by referring to the example below. →...
  • Page 384 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device 2) Strobe signal Logic Negative logic Positive logic Timing chart d +7 +4 to d +7 +4 to Strobe display Strobe display None None None None change...
  • Page 385 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device 7.8.6 ARWS 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction enters data by arrow switches for digit move and increase and decrease of numerical value of each digit.
  • Page 386 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device Content of display and operation unit Display, operation panel To PLC output Display for selected digit 7-segment display unit 7-segment display unit with latch for visual display of numeric value being set To PLC Increment...
  • Page 387 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device Cautions 1. Setting of parameter n Refer to the parameter setting of SEGL instruction. However, the setting range is 0 to 3. 2. Output format of PLC Use the PLC of transistor output type.
  • Page 388 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device • When writing in Press the X003 by setting the numeric value while observing the 7-segment display by the arrow switch. Program [Structured ladder] OUT_T TCoil TValue...
  • Page 389 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device From previous page MOVP Y015 X003 Write Setting D511 D300Z [ ST ] OUT_T(X , TC0, D300); OUT_T(X , TC1, D301); OUT_T(X , TC99, D399); M0:= X000;...
  • Page 390 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device 7.8.7 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts the 1-byte alphanumeric character string into ASCII code. This is used when selecting and displaying plural messages in the external display unit. 1.
  • Page 391 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device Extension function When the extension function is validated by turning ON M8161, the 1-byte alphanumeric character string of the device specified by is converted into ASCII code, and sequentially transferred into the device specified by only in the lower 8 bits (1 byte).
  • Page 392 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device 7.8.8 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction performs parallel output of ASCII code data to the output (Y). 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 393 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device 2. Timing chart Command input +7 Data : Scan time (ms) +8 Strobe +9 Execution busy flag Type of output signal • : Transmission output is the lower bit side, and +7 is the higher bit side.
  • Page 394 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device 2) Timing chart (When M8027=ON) Operation starts when changed from X000=OFF to ON. Drive input X000 Head character End character Data Y007 to Y000 T: Operation cycle or interrupt time Strobe Y010...
  • Page 395 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device 7.8.9 FROM 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction reads out the content of buffer memory (BFM) of special extension unit/block to the PLC. If a large quantity of buffer memory (BFM) data is read out in batch by using this instruction, a watchdog timer error may occur.
  • Page 396 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device 3. Applicable devices Bit Devices Word Devices Others System Special Cons Real Character Operand System user Digit designation Index Pointer user unit tant Number String type X Y M T C S D .b KnX KnY KnM KnS T C D R U \G...
  • Page 397 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device Cautions 1) Bit device digits to be specified by should be K1 to K4 in the case of 16-bit operation instruction, and K1 to K8 in the case of 32-bit operation. 2) When handling 32-bit data in structured program, unlike the simple project, you cannot specify the 16-bit device directly.
  • Page 398 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device - In the case of BMOV instruction [Structured ladder] [ST] BMOV(M0, U0¥G0, K4, D10); BMOV U0¥G0 Transfer destination Number of transfer points Unit No. 0 BFM #0...
  • Page 399 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device Common terms of FROM/TO instruction (detail) Specification content of operand 1. Unit number n1 of special extension unit/block Unit number is used for specifying which equipment is the object of working for FROM/TO instruction. Setting range: K0 to K7 Unit No.
  • Page 400 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device Handling in the event of occurrence of watchdog timer error 1. Cause of occurrence of watchdog timer error Watchdog timer error may occur in the following cases. 1) When many special extension equipments are connected.
  • Page 401 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device 7.8.10 TO 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction writes data from PLC into the buffer memory (BFM) of special extension unit/block. By this instruction, when data is written into multiple buffer memories (BFM) in batch a watchdog timer error may occur.
  • Page 402 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device 3. Applicable devices Bit Devices Word Devices Others System Special Cons Real Character Operand System user Digit designation Index Pointer user unit tant Number String type X Y M T C S D .b KnX KnY KnM KnS T C D R U \G...
  • Page 403 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.8 External FX I/O Device Cautions 1) About bit device digit specification to be specified by Specify K1 to K4 in the case of 16-bit operation instruction, or K1 to K8 in the case of 32-bit operation. 2) When handling 32-bit data in structured program, unlike the simple project, you cannot specify the 16-bit device directly.
  • Page 404 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) External Device (optional device) 7.9.1 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction sends and receives data in no-protocol communication by way of a serial port (only the ch1) in accordance with RS-232C or RS-485 provided in the main unit.
  • Page 405 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) Function and operation explanation 1. 16-bit operation (RS) This instruction sends and receives data in no-protocol communication by way of serial ports in accordance with RS-232C or RS-485 provided in the main unit.
  • Page 406 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) Cautions → For other cautions, refer to the Data Communication Edition manual. 1. For FX , FX and FX PLCs. 1) RS instruction can be used for ch1 only (cannot be used for ch2). Ch2 is not provided for the FX , FX , FX...
  • Page 407 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) 7.9.2 PRUN 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction handles the device number specified by specified by digits as octal number, and transfers data. 1.
  • Page 408 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) Function and operation explanation 1. 16-bit operation(PRUN, PRUNP) From octal number bit device to decimal number bit device PRUN Command input X000 ~ X017 → M0 ~ M7, M10 ~ M17 K4X000 K4M0 Octal number bit device(X)
  • Page 409 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) 7.9.3 ASCI 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts HEX code into ASCII code. Also available are BINDA instruction for converting BIN data into ASCII code, and DESTR instruction for converting binary floating decimal point data into ASCII code.
  • Page 410 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) Function and operation 1. 16-bit operation(ASCI/ASCIP) Of the HEX code stored after the device specified by , n characters (digits) are converted into ASCII code, and stored in the device after the one specified by In this instruction, the mode usable when converting includes 16-bit mode and 8-bit mode.
  • Page 411 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) Number of digits (characters) specified and result of conversion D 200 lower D 200 higher D 201 lower D 201 higher D 202 lower D 202 higher D 203 lower Not changed...
  • Page 412 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) Devices after (D100)=0ABCH (D101)=1234H (D102)=5678H Number of digits (characters) specified and result of conversion D 200 D 201 D 202 D 203 D 204 D 205 D 206 Not changed...
  • Page 413 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) 7.9.4 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts ASCII code into HEX code. Also available are DABIN instruction for converting ASCII code into BIN data, and DEVAL instruction for converting ASCII code into binary floating decimal point data.
  • Page 414 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) Function and operation explanation 1. 16-bit operation(HEX/HEXP) Of the ASCII code stored after the device specified by , n characters are converted into HEX code, and stored in the device after the one specified by .
  • Page 415 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) Number of characters specified and result of conversion "." is 0. In the case of n=K4 D 102 D 101 D 100 D 200 ...0H ..0AH Not changed...
  • Page 416 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) Conversion source data ASCII code HEX conversion D 200 D 201 D 202 D 203 D 204 D 205 D 206 D 207 D 208 Number of characters specified and result of conversion "."...
  • Page 417 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) 7.9.5 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction calculates the horizontal parity value or check sum value of error check method used in communication or the like. The error check method also includes cyclic redundancy check (CRC). Use the CRC instruction when determining the CRC value.
  • Page 418 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) Function and operation explanation 1. 16-bit operation(CCD/CCDP) The addition data and horizontal parity of the data stored in the device specified by are calculated, and the addition data and the horizontal parity are stored in the device specified by In this instruction, the mode usable when calculating includes 16-bit mode and 8-bit mode.
  • Page 419 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) 1091 in BCD. Horizontal parity 3. <8-bit conversion mode> When M8161=ON(M8161 is used commonly with RS, ASCI, HEX, CRC instructions) Of the data of n points (lower 8 bits only) starting from the device specified by , the addition data and the horizontal parity data are stored in the device specified by M8161 is used commonly with RS, ASCI, HEX, CRC instructions.
  • Page 420 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) Cautions 1) FX PLC supports the instruction at V3.07 or later. PLC supports the instruction at V1.20 or later. 2) FX PLC does not support the instruction of pulse operation type. To execute pulse operation, make the instruction execution condition pulse type.
  • Page 421 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) 7.9.6 VRRD 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction reads out the value determined by the variable resistor. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 422 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) Program example Variable resistor values are read out sequentially. Depending on variable resistors VR0 to VR7, the specified values of VRRD instruction are K0 to K7. In the example below, being decorated by index (Z = 0 to 7), K0Z is K0 to K7.
  • Page 423 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) 7.9.7 VRSC 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction reads out the value determined in the variable resistor graduations. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 424 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) Program example This is an example of use as rotary switch. Depending on variable resistor graduations 0 to 10, any one of auxiliary relays M0 to M10 is turned ON. By DECO instruction, the auxiliary relays are occupied from M0 to M15.
  • Page 425 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) 7.9.8 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction transmits and receives data by no-procedure communication via serial port of RS-232C or RS-485 installed in the basic unit. In the case of FX PLC, data can be transmitted and received by no-procedure communication also via standard built-in port (RS-422).
  • Page 426 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) Function and operation explanation 1. 16-bit operation(RS2) This instruction transmits and receives data by no-procedure communication via serial port of RS-232C or RS-485 installed in the basic unit. →...
  • Page 427 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) System configuration In order to use this instruction, you must install any one of the following products in the basic unit. → As for the system configuration, refer to the hardware manual of the corresponding PLC main unit.
  • Page 428 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) 7.9.9 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction executes PID control for changing the output values depending on the change value of the input. →...
  • Page 429 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) 2. Setting items No. of points Setting items Content occupied • To set the target value (SV). • PID instruction does not change the contents of setting. •...
  • Page 430 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) Setting items Content of setting Remarks Direction of action (ACT): Output change amount (increase 0 to 32767 side) alarm setting value +1 bit2 = 1, bit5 = 0; valid Direction of action (ACT): Output upper limit setting value -32768 to 32767...
  • Page 431 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.9 External Device (optional device) 4. FX , FX PLCs support the instruction at V3.30 or later. 5. FX PLC supports the upper and lower limit setting functions of the auto-tuning and output value at V3.00 or later.
  • Page 432 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.10 External Device 7.10 External Device 7.10.1 MNET 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction exchanges ON/OFF signals between the FX , FX PLCs, and F-16NP/NT type interface unit. 1.
  • Page 433 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.10 External Device Cautions 1) In the case of FX-16NP/NT, FX-16NP/NT-S3 type interface block, this instruction is not used, and FX 24EI is not needed. 2) FX , FX PLCs do not support the instruction at V3.30 or later.
  • Page 434 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.10 External Device 7.10.2 ANRD 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction writes the analog input of F -6A type analog input and output unit. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 435 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.10 External Device Program example This is intended to determine the average of three points of time series data in 100 ms unit in order to suppress fluctuations of the analog input. [Structured ladder] To store the data of input channel 10 of F ANRD...
  • Page 436 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.10 External Device 7.10.3 ANWR 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction writes data from the PLC in the F -6A type analog input and output unit, and issues as analog data.
  • Page 437 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.10 External Device 7.10.4 RMST 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction gives start signal from the PLC or receives status information, in the F -32RM type programmable cam switch. 1.
  • Page 438 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.10 External Device 7.10.5 RMWR 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction sends output prohibit information from the PLC to the F -32RM type programmable cam switch. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 439 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.10 External Device Function and operation explanation • This instruction sends output prohibit information from the PLC to the RMWR X000 -32RM type programmable cam switch. M500 Y030 • The content of the device specified by is determined by the X040 connection position of FX...
  • Page 440 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.10 External Device 7.10.6 RMRD 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction reads out the ON/OFF state of output of the F -32RM type programmable cam switch to the PLC.
  • Page 441 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.10 External Device Function and operation explanation • This instruction reads out the ON/OFF state of output of the F -32RM RMRD X000 type programmable cam switch to the PLC. Y030 X040 •...
  • Page 442 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.10 External Device 7.10.7 RMMN 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction reads out the rotating speed (rpm) or present angle of the resolver connected to the F -32RM type programmable cam switch to the PLC.
  • Page 443 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.10 External Device 7.10.8 BLK 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction specifies the block number for the F -30GM type pulse output unit from the PLC. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 444 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.10 External Device Function and operation explanation • The block number is specified from the PLC to the F -30GM type pulse X000 output unit. The block number is the content of the device specified by , and Y030 the value is BIN, but is valid in a range of 0 to 31 as converted to BCD.
  • Page 445 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.10 External Device 7.10.9 MCDE 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction sends the M code numbers M0 to M77 to the PLC from the F -30GM type pulse output unit. 1.
  • Page 446 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.11 Data Transfer 2 7.11 Data Transfer 2 7.11.1 ZPUSH 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction temporarily retracts the present values of index registers V0 to V7, Z0 to Z7. To return the retracted present values to the original values, use the ZPOP instruction.
  • Page 447 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.11 Data Transfer 2 Function and operation explanation 1. 16-bit operation (ZPUSH/ZPUSHP) Command ZPUSH input Head device for retracting the contents of index register 1) Contents of index registers V0 to V7, Z0 to Z7 are temporarily retracted in and after the device specified .
  • Page 448 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.11 Data Transfer 2 Program example This is a program for retracting the contents of index registers Z0 to Z7, V0 to V7 before execution of subroutine program after D0, when using the index register in the subroutine after pointer P0. [Structured ladder] [ ST ] M8002...
  • Page 449 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.11 Data Transfer 2 7.11.2 ZPOP 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction returns the contents of index registers V0 to V7, Z0 to Z7 once retracted by the ZPUSH instruction to the original state.
  • Page 450 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.11 Data Transfer 2 Related instructions Instruction Content ZPUSH This instruction temporarily retracts the present values of index registers V0 to V7, Z0 to Z7. Error It is an operation error in the following case, and error flag M8067 is turned ON, and error code is stored in D8067.
  • Page 451 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12 Floating Point 7.12.1 DECMP 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction compares two data (binary floating decimal point), and issues the result of greater, smaller, or equal to the bit device (3 points).
  • Page 452 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Function and operation explanation 1. 32-bit operation (DECMP, DECMPP) The compared value specified by and the comparison source specified by are compared as floating decimal point data, and depending on the result of greater, smaller, or equal, any bit of devices ( +1, and +2) specified by is turned ON.
  • Page 453 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.2 DEZCP 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction compares the comparison range of upper and lower two points and the data (binary floating decimal point), and issues the result to the bit device (3 points) depending on the greater, smaller or the band. →...
  • Page 454 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Function and operation explanation 1. 32-bit operation (DEZCP, DEZCPP) The compared value specified by and the comparison source specified by are compared as floating decimal point data, and depending on the result of smaller, within range, or greater, any bit of devices +1, and +2) specified by is turned ON.
  • Page 455 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.3 DEMOV 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction transfers binary floating point data. → As for handling of floating decimal point, refer to FX Structured Programming Manual (Device & Common).
  • Page 456 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Function and operation explanation 1. 32-bit operation (DEMOV/DEMOVP) The content (binary floating decimal point data) of transfer source of device specified by is transferred to the device specified by .
  • Page 457 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.4 DESTR 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts the binary floating decimal point data into character string (ASCII code) in a specified number of digits. You can also use the STR instruction for converting BIN data into character string (ASCII code).
  • Page 458 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Function and operation explanation 1. 32-bit operation (DESTR/DESTRP) The content (binary floating decimal point data) of the device specified by is converted into character string depending on the content of the device specified by , and stored in or after the device specified by .
  • Page 459 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point For example, in the case of all digits of 8 and decimal digits of 3, when -1.23456 is specified, the data after is stored as follows. All digits Number of digits below decimal point...
  • Page 460 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 3. In the case of exponential type b8 b7 ASCII code of digit number ASCII code of the sign Exponential type (all digits specified value - 1) All digits ASCII code of ASCII code of digit number...
  • Page 461 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point • The converted character string data is stored in the device after as follows. - For the sign of integer part, "20H" (space) is stored when the binary floating decimal point data is positive, and "2DH"...
  • Page 462 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Related instructions Instruction Content EVAL This instruction converts the character string (ASCII code) data into binary floating decimal point data. This instruction converts BIN data into character string (ASCII code). This instruction converts the character string (ASCII code) data into BIN data.
  • Page 463 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Program example 1) This is a program for converting the content (binary floating decimal point data) of R0, R1 depending on the content specified by R10 to R12 when the X000 is turned ON, and storing after the D0. [Structured ladder] [ST] DESTRP...
  • Page 464 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.5 DEVAL 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts the character string (ASCII code) into binary floating decimal point data. You can also use the VAL instruction for converting the character string (ASCII code) into BIN data. →...
  • Page 465 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point The character string specified can be converted into binary floating point decimal data whether in decimal point type or in specified type. b8 b7 ASCII code of first character ASCII code of the sign ASCII code of third character ASCII code of second character...
  • Page 466 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point b) In the case of exponential type b8 b7 20H(space) 2DH(-) 2EH(.) 31H(1) 35H(5) 33H(3) 33H(3) 30H(0) -1.35034E-2 31H(1) 34H(4) Binary floating decimal 45H(E) 32H(2) point (real number) 30H(0) 2DH(-) 32H(2)
  • Page 467 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Caution When handling character string data or 32-bit data in structured program, you cannot specify 16-bit device directly unlike the simple project. When handling character string data or 32-bit data, please use the label. However, the 32-bit counter is a 32-bit long device, and can be specified directly.
  • Page 468 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Program example 1) This is a program for converting the character string stored after R0 when the X000 is turned ON, into binary floating decimal point, and storing in D0, D1. [Structured ladder] [ST] DEVAR(X000,VAR_01,VAR_02);...
  • Page 469 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 2) This is a program for converting the character string stored after D10 when the X000 is turned ON, into binary floating decimal point, and storing in D100, D101. [Structured ladder] [ST] DEVALP...
  • Page 470 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.6 DEBCD 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts the binary floating decimal point in the device into decimal floating decimal point. → As for handling of floating decimal point, refer to FX Structured Programming Manual (Device & Common).
  • Page 471 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Function and operation explanation 1. 32-bit operation (DEBCD, DEBCDP) The binary floating decimal point of the device specified by is converted into decimal floating decimal point, and is transferred to the device specified by Command DEBCD input...
  • Page 472 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.7 DEBIN 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts the decimal floating decimal point in the device into binary floating decimal point. → As for handling of floating decimal point, refer to FX Structured Programming Manual (Device & Common).
  • Page 473 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Function and operation explanation 1. 32-bit operation (DEBIN, DEBINP) The decimal floating decimal point of the device specified by is converted into binary floating decimal point, and is transferred to the device specified by Command DEBIN input...
  • Page 474 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Program example By using the DEBIN instruction, the numeric value including the decimal point can be directly converted into the binary floating decimal point. Example: Binary floating decimal point conversion of 3.14 3.14=314×10 (Decimal floating decimal point) [Structured ladder]...
  • Page 475 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.8 DEADD 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction adds two binary floating decimal points. → As for program example of floating decimal point operation, refer to section 7.5.10. →...
  • Page 476 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Function and operation explanation 1. 32-bit operation (DEADD, DEADDP) The binary floating decimal point data in the device specified by and in the device specified by added, and the result is transferred to the device specified by in binary floating decimal point.
  • Page 477 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.9 DESUB 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction subtracts two binary floating decimal points. → As for program example of floating decimal point operation, refer to section 7.5.10. →...
  • Page 478 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Function and operation explanation 1. 32-bit operation (DESUB, DESUBP) The binary floating decimal point data in the device specified by are subtracted from the device specified , and the result is transferred to the device specified by in binary floating decimal point.
  • Page 479 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.10 DEMUL 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction multiplies two binary floating decimal points. → As for program example of floating decimal point operation, refer to section 7.5.10. →...
  • Page 480 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Function and operation explanation 1. 32-bit operation (DEMUL, DEMULP) The binary floating decimal point data in the device specified by and in the device specified by multiplied, and the result is transferred to the device specified by in binary floating decimal point.
  • Page 481 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.11 DEDIV 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction divides two binary floating decimal points. → As for program example of floating decimal point operation, refer to section 7.5.10. →...
  • Page 482 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Function and operation explanation 1. 32-bit operation (DEDIV, DEDIVP) The binary floating decimal point data in the device specified by and in the device specified by divided, and the result is transferred to the device specified by in binary floating decimal point.
  • Page 483 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.12 DEXP 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction executes exponential operation whose base is "e (2.71828)". → As for handling of floating decimal point, refer to FX Structured Programming Manual (Device & Common).
  • Page 484 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Error In the following cases, it is an operation error, error flag (M8067) is turned ON, and error code is stored in D8067. • When the operation result is out of the following range. (Error code: K6706) -126 ≤...
  • Page 485 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.13 DLOGE 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction executes natural logarithm operation. 1. Format and operation, execution form Expression in each language Instruction Execution Operation name form Structured ladder...
  • Page 486 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Caution When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the simple project. When handling 32-bit data, please use the label. However, the 32-bit counter is a 32-bit long device, and can be specified directly.
  • Page 487 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.14 DLOG10 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction executes common logarithm operation. → As for handling of floating decimal point, refer to FX Structured Programming Manual (Device & Common).
  • Page 488 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Caution When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the simple project. When handling 32-bit data, please use the label. However, the 32-bit counter is a 32-bit long device, and can be specified directly.
  • Page 489 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.15 DESQR 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction executes the square root operation of binary floating decimal point. → As for handling of floating decimal point, refer to FX Structured Programming Manual (Device & Common).
  • Page 490 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Related devices → As for the manner of using the zero flag, refer to the FX Structured Programming Manual (Device & Common). Device Name Content M8020 Zero To be turned ON when the operation result is true 0.
  • Page 491 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.16 DENEG 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction inverts the sign of binary floating decimal point (real number) data. → As for handling of floating decimal point, refer to FX Structured Programming Manual (Device & Common).
  • Page 492 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Program example This is a program for inverting the sign of the binary floating decimal point data of D100, D101 when the X000 is turned ON, and storing in D100, D101. [Structured ladder] DENEGP X000...
  • Page 493 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.17 INT 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts the binary floating decimal point into BIN integer in normal data type in the PLC. (From binary floating decimal point data to BIN integer) →...
  • Page 494 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Function and operation explanation 1. 16-bit operation (INT, INTP) The binary floating decimal point of the device specified by is converted into BIN integer, and is transferred to the device specified by Command input...
  • Page 495 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.18 DSIN 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction determines the SIN value of angle (RAD). → As for handling of floating decimal point, refer to FX Structured Programming Manual (Device & Common).
  • Page 496 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Cautions 1) When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the simple project. When handling 32-bit data, please use the label. However, the 32-bit counter is a 32-bit long device, and can be specified directly.
  • Page 497 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.19 DCOS 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction determines the COS value of angle (RAD). → As for handling of floating decimal point, refer to FX Structured Programming Manual (Device & Common).
  • Page 498 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Cautions 1) When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the simple project. When handling 32-bit data, please use the label. However, the 32-bit counter is a 32-bit long device, and can be specified directly.
  • Page 499 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.20 DTAN 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction determines the TAN value of angle (RAD). → As for handling of floating decimal point, refer to FX Structured Programming Manual (Device & Common).
  • Page 500 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Cautions 1) When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the simple project. When handling 32-bit data, please use the label. However, the 32-bit counter is a 32-bit long device, and can be specified directly.
  • Page 501 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.21 DASIN 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction executes SIN operation. → As for handling of floating decimal point, refer to FX Structured Programming Manual (Device & Common).
  • Page 502 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Function and operation explanation 1. 32-bit operation (DASIN/DASINP) The angle is determined from the SIN value specified by , and the operation result is stored in the device specified by .
  • Page 503 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Program example This is a program for determining SIN of D0, D1 (binary floating decimal point) when the X000 is ON, and sending the angle to Y040 to Y057 in BCD four digits. [Structured ladder] X000 DASIN...
  • Page 504 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.22 DACOS 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction executes COS operation. → As for handling of floating decimal point, refer to FX Structured Programming Manual (Device & Common).
  • Page 505 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Function and operation explanation 1. 32-bit operation (DACOS/DACOSP) The angle is calculated from the COS value specified by , and the operation result is stored in the device specified by .
  • Page 506 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Program example This is a program for determining COS of D0, D1 (binary floating decimal point) when the X000 is ON, and sending the angle to Y040 to Y057 in BCD four digits. [Structured ladder] X000 DACOS...
  • Page 507 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.23 DATAN 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction executes TAN operation. → As for handling of floating decimal point, refer to FX Structured Programming Manual (Device & Common).
  • Page 508 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Function and operation explanation 1. 32-bit operation (DATAN/DATANP) The angle is calculated from the TAN value specified by , and the operation result is stored in the device specified by .
  • Page 509 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Program example This is a program for determining TAN of D0, D1 (binary floating decimal point) when the X000 is ON, and sending the angle to Y040 to Y057 in BCD four digits. [Structured ladder] X000 DATAN...
  • Page 510 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.24 DRAD 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts the value of angle unit to the radian unit. → As for handling of floating decimal point, refer to FX Structured Programming Manual (Device & Common).
  • Page 511 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Function and operation explanation 1. 32-bit operation (DRAD/DRADP) The angle specified by is converted from the degree unit to the radian unit, and is stored in the device specified by .
  • Page 512 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Program example This is a program for converting the angle set in BCD four digits in X020 to X037 when the X000 is ON, and storing in binary floating decimal point in D20, D21. [Structured ladder] X000 Input of angle to be converted to radian value.
  • Page 513 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point 7.12.25 DDEG 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts the radian unit value into the angle (DEG) unit. → As for handling of floating decimal point, refer to FX Structured Programming Manual (Device & Common).
  • Page 514 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.12 Floating Point Caution When handling 32-bit data in structured program, you cannot specify 16-bit device directly unlike the simple project. When handling 32-bit data, please use the label. However, the 32-bit counter is a 32-bit long device, and can be specified directly.
  • Page 515 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.13 Data Operation 2 7.13 Data Operation 2 7.13.1 WSUM 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction calculates the total value of continuous 16-bit data or 32-bit data. Please use the CCD when calculating the sum data (total value) in byte (8-bit) unit. →...
  • Page 516 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.13 Data Operation 2 3. Applicable devices Bit Devices Word Devices Others System Special Cons Real Character Operand System user Digit designation Index Pointer user unit tant Number String type X Y M T C S D .b KnX KnY KnM KnS T C D R U \G V Z Modifier K H...
  • Page 517 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.13 Data Operation 2 Cautions 1) In 32-bit operation, the total value becomes 64-bit data. FX , FX PLCs cannot handle 64-bit data. However, when the total value is in the numeric value range of 32-bit data (K-2,147,483,648 to K2,147,483,647), higher 32-bit data is ignored, and the lower 32-bit data can be handled as the total value.
  • Page 518 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.13 Data Operation 2 7.13.2 WTOB 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction separates continuous 16-bit data in byte (8-bit) unit. 1. Format and operation, execution form Expression in each language Instruction Execution Operation...
  • Page 519 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.13 Data Operation 2 Function and operation explanation 1. 16-bit operation (WTOB/WTOBP) 1) This instruction separates n/2 points of 16-bit data stored after the device specified by into n bytes, and stores into n devices starting from the device specified by as explained below.
  • Page 520 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.13 Data Operation 2 Error In the following case, it is an operation error, error flag M8067 is turned ON, and error code is stored in D8067. 1) When devices +n/2 of separation source exceed the device range of specified devices.
  • Page 521 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.13 Data Operation 2 7.13.3 BTOW 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction couples the lower 8 bits (lower byte) of continuous 16-bit data. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 522 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.13 Data Operation 2 Function and operation explanation 1. 16-bit operation (BTOW/BTOWP) 1) This instruction stores the 16-bit data coupling lower byte (8 bit) of 16-bit data of n points from the device specified by , into n/2 devices starting from as follows.
  • Page 523 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.13 Data Operation 2 Cautions 1) The device storing the coupling source data and the device storing the coupled data can be used in overlap. However, it must be noted that the higher byte (8 bits) of the coupling source data stored in the device used in overlap is erased because the data of the higher byte (8 bits) is overwritten by the coupled data.
  • Page 524 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.13 Data Operation 2 7.13.4 UNI 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction couples lower 4 bits of continuous 16-bit data. 1. Format and operation, execution form Expression in each language Instruction Execution Operation...
  • Page 525 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.13 Data Operation 2 Function and operation explanation 1. 16-bit operation (UNI/UNIP) 1) 16-bit data coupling lower 4 bits of 16-bit data of n points from the device specified by is stored in the device specified by as shown below.
  • Page 526 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.13 Data Operation 2 Program example This is a program for coupling lower 4 bits of D0 to D2 when the X000 is turned ON, and storing in D10. [Structured ladder] UNIP X000...
  • Page 527 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.13 Data Operation 2 7.13.5 DIS 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction separates 16-bit data in 4-bit unit. 1. Format and operation, execution form Expression in each language Instruction Execution Operation...
  • Page 528 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.13 Data Operation 2 Function and operation explanation 1. 16-bit operation (DIS/DISP) 1) This instruction separates 16-bit data of the device specified by in 4-bit unit, and storing in the device specified by as follows.
  • Page 529 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.13 Data Operation 2 7.13.6 SWAP 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction swaps higher 8 bits and lower 8 bits of word data. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 530 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.13 Data Operation 2 Function and operation explanation 1. 16-bit operation (SWAP, SWAPP, DSWAP, DSWAPP) This instruction swaps lower 8 bits and higher 8 bits. Command SWAPP input Higher 8 bits Lower 8 bits Device for swapping higher and lower bytes.
  • Page 531 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.13 Data Operation 2 7.13.7 SORT2 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction sorts the data table composed of data (rows) and group data (columns) in the ascending order/descending order in row unit on the basis of the specified group data (rows). In this instruction, data (row direction) is stored in continuous devices, and it is easy to add the data (row).
  • Page 532 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.13 Data Operation 2 Function and operation explanation 1. 16-bit operation (SORT2) This instruction sorts the data rows of data table (sorting source) of (m1×m2) points from the device specified in the ascending order/descending order on the basis of group data of n rows, and stores in data table (after sorting) of (m1×m2) points from the device specified by →...
  • Page 533 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.13 Data Operation 2 2. 32-bit operation (DSORT2) This instruction sorts the data rows of data table (sorting source) of (m1×m2) points from the device specified in the ascending order/descending order on the basis of group data of n rows, and stores in data table (after sorting) of (m1×m2) points from the device specified by →...
  • Page 534 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.13 Data Operation 2 3. Operation example The operation is as follows when the following sorting source data is executed in "n=K2 (column number 2)", "n=K3 (column number 3)". The operation example is a case of 16-bit operation.
  • Page 535 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.13 Data Operation 2 Related devices → As for the manner of using the instruction execution complete flag, refer to section 1.3.4. Device Name Content Instruction execution M8029 Turned ON when data sorting instruction is complete. complete Sorted in descending order when M8165=ON.
  • Page 536 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control 7.14 Positioning Control 7.14.1 DSZR 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction matches the mechanical position and the current value register in the PLC by zero return. This instruction can perform following operation which is not supported by ZRN.
  • Page 537 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control Function and operation explanation Command DSZR input Device for entering the near-point signal (DOG) Device for issuing pulse Device for entering zero-point signal Device of rotating direction signal Cautions 1) Applicable devices are limited.
  • Page 538 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control 7.14.2 DVIT 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction executes one-speed interrupt inching. → As for explanation of the instruction, see the positioning control manual. → As for cautions of use of high speed output special adapter, see the positioning control manual. 1.
  • Page 539 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control Function and operation explanation Command DVIT input Number of output pulses after interrupt Device for issuing pulse (Y) Output pulse frequency Device of rotating direction signal Command DDVIT input...
  • Page 540 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control Cautions 1) When handling 32-bit data in structured program, you cannot designate 16-bit device directly unlike the simple project. When handling 32-bit data, please use the label. However, the 32-bit counter is a 32-bit long device, and 32-bit data can be specified directly.
  • Page 541 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control 7.14.3 DTBL 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction operates the instruction predetermined in the data table by GX Works2 by one specified table. → As for explanation of the instruction, see the positioning control manual. →...
  • Page 542 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control Function and operation explanation Command DTBL input Table number to be executed Device for issuing pulse (Y) Cautions about writing during RUN The circuit block including DTBL cannot be written during RUN. Cautions 1) When handling 32-bit data in structured program, you cannot designate 16-bit device directly unlike the simple project.
  • Page 543 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control 7.14.4 DABS 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction connects with our company's MR-H, MR-J2(S) or MR-J3 type servo amplifier (with absolute position detecting function), and reads out the absolute position (ABS) data. The data is read out in pulse converted value.
  • Page 544 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control Function and operation explanation Command DABS input Head device for issuing the control signal for absolute Head device for entering the output signal value (ABS) data to the servo amplifier for absolute value (ABS) data from the servo amplifier Label...
  • Page 545 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control 7.14.5 ZRN 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction matches the mechanical position and the current value register in the PLC by zero return. Please use DSZR when DOG search function is necessary. →...
  • Page 546 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control Function and operation explanation Command input Device for issuing pulse Speed when starting to zero return Creep speed Device for entering the near-point signal (DOG) Command DZRN input Label 1...
  • Page 547 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control Function changes by version This instruction includes the function changes as shown in the table below depending on the version. → As for the explanation of the instruction and contents of function changes, refer to the positioning control manual.
  • Page 548 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control 5) While zero return, the numeric values of the current value registers (Y000: [D8141, D8140], Y001: [D8143, D8142]) move in the decreasing direction. (FX , FX , FX PLCs) When zero return in reverse direction, please control the output relay (Y) wired as "rotating direction...
  • Page 549 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control 7.14.6 PLSV 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction issues a variable speed pulse with the rotating direction. → As for explanation of the instruction, see the positioning control manual. →...
  • Page 550 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control Function and operation explanation Command PLSV input Output pulse frequency Device for issuing pulse (Y) Device of rotating direction signal Command DPLSV input Label Device for issuing pulse(Y) (Output pulse frequency Device of rotating direction signal is defined.)
  • Page 551 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control Cautions 1) When handling 32-bit data in structured program, you cannot designate 16-bit device directly unlike the simple project. When handling 32-bit data, please use the label. However, the 32-bit counter is a 32-bit long device, and 32-bit data can be specified directly.
  • Page 552 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control 3: FX , FX PLCs only are applicable, index (V, Z) decoration is disabled. 4: FX , FX , FX PLCs only are applicable. 5: FX , FX PLCs only are applicable.
  • Page 553 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control 7.14.7 DRVI 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction performs one-speed positioning by relative drive. The moving distance from the present position is specified together with plus or minus sign, and this is also called increment (relative) driving method.
  • Page 554 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control Function and operation explanation Command DRVI input Number of output pulses (relative address) Device for issuing pulse (Y) Output pulse frequency Device of rotating direction signal Command DDRVI input...
  • Page 555 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control 3) Applicable devices are limited. 1: <FX , FX , FX PLCs> Please specify Y000, Y001, Y002 of transistor output of basic unit, or Y000, Y001, Y002 , Y003 of high speed output special adapter Y002 cannot be used in the 14-point type or 24-point type of FX...
  • Page 556 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control 7.14.8 DRVA 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction performs one-speed positioning by absolute drive. The moving distance from the origin (0 point) is specified, and this is also called absolute driving method. 1.
  • Page 557 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control Function and operation explanation Command DRVA input Number of output pulses (absolute address) Device for issuing pulse (Y) Output pulse frequency Device of rotating direction signal Command DDRVA input...
  • Page 558 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.14 Positioning Control <FX , FX , FX PLCs> Specify Y000 or Y001. As the output of the PLC, please use the transistor output. 2: <FX , FX , FX PLCs>...
  • Page 559 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control 7.15 Real Time Clock Control 7.15.1 TCMP 3U(C) 2N(C) 1N(C) 0(S) Outline The comparison time and the time data are compared, and the bit device is turned ON or OFF depending on the magnitude of difference.
  • Page 560 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control Function and operation explanation 1. 16-bit operation (TCMP) The time of comparison time (hour, minute, second) is compared with the time data (hour, minute, second) of the device specified by , and the device specified by is turned ON or OFF depending on the magnitude of difference.
  • Page 561 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control Program example [Structured ladder] [ST] X000 M0:=TCMP(X000,K10,K30,K50,D0); TCMP M1:=TCMP(X000,K10,K30,K50,D0); 10 hours, M2:=TCMP(X000,K10,K30,K50,D0); 30 minutes, 50 seconds (hour) 10 hours, and then > (minute) 30 minutes, turned ON 50 seconds (second)
  • Page 562 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control 7.15.2 TZCP 3U(C) 2N(C) 1N(C) 0(S) Outline The comparison time of higher and lower points and the time data are compared, and the bit device is turned ON or OFF depending on the magnitude of difference.
  • Page 563 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control Function and operation explanation 1. 16-bit operation (TZCP, TZCPP) The comparison time (hour, minute, second) of higher and lower points and the time data (hour, minute, second) of the device specified by are compared, and the device specified by is turned ON or OFF...
  • Page 564 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control Program example [Structured ladder] [ST] M3:=TZCP(X000,D20,D30,D0); X000 TZCP M4:=TZCP(X000,D20,D30,D0); M5:=TZCP(X000,D20,D30,D0); (hour) (hour) > and then turned ON (minute) (minute) (second) (second) (hour) (hour) (hour) ≤...
  • Page 565 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control 7.15.3 TADD 3U(C) 2N(C) 1N(C) 0(S) Outline Two time data are added and stored in the word device. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 566 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control Function and operation explanation 1. 16-bit operation (TADD) Time data (hour, minute, second) of the device specified by , and time data (hour, minute, second) of the device specified by are added, and the result is stored in the device specified by Command...
  • Page 567 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control 7.15.4 TSUB 3U(C) 2N(C) 1N(C) 0(S) Outline Two time data are subtracted and stored in the word device. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 568 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control Function and operation explanation 1. 16-bit operation (TSUB, TSUBP) From the time data (hour, minute, second) of the device specified by , the time data (hour, minute, second) of the device specified by is subtracted, and the result is stored in the device specified by Command...
  • Page 569 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control 7.15.5 HTOS 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts the "hour, minute, second" unit (time) data into second unit data. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 570 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control Function and operation explanation 1. 16-bit operation (HTOS/HTOSP) The time data (hour, minute, second) of the device specified by is converted into the second unit, and the result is stored in the device specified by Command HTOS...
  • Page 571 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control Error In the following case, it is an operation error, and the error flag (M8067) is turned ON, and the error code is stored in D8067. 1) When the data of the device specified by is out of the range.
  • Page 572 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control 7.15.6 STOH 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts the time data in second unit into time data in "hour, minute, second" unit. 1.
  • Page 573 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control Function and operation explanation 1. 16-bit operation The second unit data of the device specified by is converted into "hour, minute, second" unit, and the result is stored in the device specified by Command STOH...
  • Page 574 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control Program example This is a program for converting the second unit data stored in D0, D1 when the X020 is turned ON, into the "hour, minute, second"...
  • Page 575 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control 7.15.7 TRD 3U(C) 2N(C) 1N(C) 0(S) Outline The clock data is read out in the real-time clock built in the PLC. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 576 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control Function and operation explanation 1. 16-bit operation (TRD) The clock data (D8013 to D8019) of the real-time clock built in the PLC is read out into the device specified by in the following format.
  • Page 577 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control 7.15.8 TWR 3U(C) 2N(C) 1N(C) 0(S) Outline The clock data is written into the real-time clock built in the PLC. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 578 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control Function and operation explanation The setting clock data stored in the device specified by is written into the clock data (D8013 to D8019) of the real-time clock built in the PLC.
  • Page 579 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control Program example 1. Setting example of clock data (time) To set the real-time clock. In the case of 15 hours, 20 minutes, 30 seconds, Tuesday, April 25, 2001. [Structured ladder] [ST] M0:=LDP(TRUE,X000);...
  • Page 580 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control 3) When handling the year in four digits, please add the following program. D8018 operates in four-digit year mode from the second scan after RUN of PLC. M8002 Initial pulse K2000...
  • Page 581 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control 7.15.9 HOUR 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction adds and measures the ON time duration of input contact in one-hour unit. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 582 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control Function and operation explanation 1. 16-bit operation When the cumulative total of ON time duration of Command command input exceeds the time of the device HOUR input specified by...
  • Page 583 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.15 Real Time Clock Control Cautions 1) When handling array data or 32-bit data in structured program, you cannot specify 16-bit device directly unlike the simple project. When handling array data or 32-bit data, please use the label. However, the 32-bit counter is a 32-bit long device, and 32-bit data can be specified directly.
  • Page 584 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.16 External Device 7.16 External Device 7.16.1 GRY 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts a binary value into a gray code, and transfers it. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 585 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.16 External Device Function and operation explanation 1. 16-bit operation (GRY, GRYP) [Structured ladder] [ST] Command GRY(EN,s,d); input Conversion source data Word device storing or word device storing data after conversion conversion source data This instruction converts and transfers data from the source (binary) to the destination (gray code).
  • Page 586 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.16 External Device 7.16.2 GBIN 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts a gray code into a binary value, and transfers it. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 587 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.16 External Device Function and operation explanation 1. 16-bit operation (GBIN, GBINP) [Structured ladder] [ST] Command GBIN(EN,s,d); GBIN input Conversion source data Word device storing or word device storing data after conversion conversion source data This instruction converts and transfers data from...
  • Page 588 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.16 External Device 7.16.3 RD3A 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction reads an analog input value from the analog block FX -3A or FX -2AD. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 589 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.16 External Device Function and operation explanation 1. 16-bit operation (RD3A) [Structured ladder] Command RD3A input Special block number Word device storing the read data Analog input channel <For FX and FX PLCs>...
  • Page 590 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.16 External Device 7.16.4 WR3A 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction writes a digital value to the analog block FX -3A and FX -2DA. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 591 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.16 External Device Function and operation explanation 1. 16-bit operation (WR3A, WR3AP) [Structured ladder] [ST] Command WR3A(EN,m1,m2,s); WR3A input Special block number Analog output channel Data to be written or word device storing data to be written.
  • Page 592 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.17 Extension Function 7.17 Extension Function 7.17.1 EXTR_IN 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction writes the operation control instructions and parameters of the memory for extension function. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 593 Value written in inverter General purpose inverters FREQROL-A500/E500/S500 (with communications functions) series made by Mitsubishi Electric Corporation Refer to the "Instruction code List" described later. Also refer to the pages describing in detail the computer links from the inverter manual.
  • Page 594 Inverter station number Inverter parameter number (decimal) Value written in inverter General purpose inverters FREQROL-A500/E500/S500 (with communications functions) series made by Mitsubishi Electric Corporation 2. Related devices The same as the inverter operation control described above. Caution 1) The FX and FX PLCs of V3.00 or later support the EXTR_IN instruction.
  • Page 595 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.17 Extension Function 7.17.2 EXTR_OUT 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction is for the short mail transmission of the memory for extension function, inverter operation monitoring instruction, and parameter readout. 1.
  • Page 596 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.17 Extension Function Function and operation explanation1 (Transmitting short mail) → For the details of the instruction, refer to Communication Control Manual. This instruction is for using the optional memory for extension function. When K0 is set to the device specified by , the PLC transmits the short mail.
  • Page 597 Inverter station number Inverter instruction code General purpose inverters FREQROL-A500/E500/S500 (with communications functions) series made by Mitsubishi Electric Corporation Refer to the instruction code list described later. Also refer to the pages describing in detail the computer links from the inverter manual.
  • Page 598 Destination device storing readout value. Inverter station number Inverter parameter number General purpose inverters FREQROL-A500/E500/S500 (with communications functions) series made by Mitsubishi Electric Corporation 2. Related devices The same as the short mail transmission described above. Caution The FX and FX PLCs of V3.00 or later support the EXTR_IN instruction.
  • Page 599 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.18 Others 7.18 Others 7.18.1 COMRD 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction reads the comment data for registered devices written to the PLC by programming software such as GX Works2. 1.
  • Page 600 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.18 Others Function and operation explanation 1. 16-bit operation (COMRD/COMRDP) 1) The comment registered for the device specified by is read, and stored in ASCII code in the device specified by Command COMRDP...
  • Page 601 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.18 Others Cautions 1) When handling character string data in a structured program, a 16-bit device cannot be specified directly as in the case of a simple project. Use a label to handle character string data. Use a global label to specify a label.
  • Page 602 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.18 Others 7.18.2 RND 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction generates random numbers. 1. Format and operation, execution form Expression in each language Instruction Execution Operation name form Structured ladder 16 bits Continuous...
  • Page 603 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.18 Others Program examples In the program example shown below, a random number is stored to D100 every time X010 turns ON. When the PLC mode switches from STOP to RUN, the time data converted into seconds and added by the value "(Year + Month) ×...
  • Page 604 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.18 Others 7.18.3 DUTY 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction generates the timing signal whose one cycle corresponds to the specified number of operation cycles. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 605 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.18 Others Function and operation explanation 1. 16-bit operation (DUTY) 1) The timing clock output of the device specified by is set to ON and OFF with the ON duration for "n1" scans and OFF duration for "n2"...
  • Page 606 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.18 Others Related devices Device Name Description M8330 Timing clock output 1 M8331 Timing clock output 2 M8332 Timing clock output 3 Timing clock output in DUTY instruction M8333 Timing clock output 4 M8334 Timing clock output 5...
  • Page 607 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.18 Others 7.18.4 CRC 3U(C) 2N(C) 1N(C) 0(S) Outline This CRC instruction calculates the CRC (cyclic redundancy check) value which is an error check method used in communication. In addition to CRC value, there are other error check methods such as parity check and sum check. For obtaining the horizontal parity value and sum check value, CCD instruction is available.
  • Page 608 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.18 Others Function and operation explanation 1. 16-bit operation CRC value is generated for "n" 8-bit data (unit: byte) starting from a device specified in , and stored to the device specified by The 8-bit conversion mode and 16-bit conversion mode are available in this instruction, and the mode can be switched by turning ON or OFF M8161.
  • Page 609 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.18 Others 2) 8-bit conversion mode [M8161 = ON] In this mode, the operation is executed only for low-order 8 bits (low-order byte) of device specified by With regard to the operation result, low-order 8 bits (byte) are stored to a device specified by , and high-order 8 bits (byte) are stored to a device specified by M8000...
  • Page 610 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.18 Others Error An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is stored in D8067. 1) When any digits other than 4 digits are specified as the devices specified as in digit specification of bit device (error code: K6706) 2) When n is outside the allowable range (1 to 256) (error code: K6706)
  • Page 611 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.18 Others 7.18.5 DHCMOV 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction transfers the current value of a specified high speed counter or ring counter. The function of this instruction varies depending on the PLC version. 1.
  • Page 612 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.18 Others Function and operation explanation 1. 32-bit operation (DHCMOV) Command This defines the device of the high speed counter DHCMOV input or ring counter of the transfer destination. Label 1 Label This defines the transfer destination device.
  • Page 613 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.18 Others Cautions When programming DHCMOV instruction in an input interrupt program, the following points should be observed. For assignment of pointers for input interrupt and inputs, refer to the table shown in 5) below. 1) Program EI and FEND instructions in the main program.
  • Page 614 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.18 Others 4) It is not permitted to use DHCMOV instruction for the same counter in two or more input interrupt programs. [Interrupt program] (Event: I000) DHCMOV M8394 VAR_01 C236 VAR_01 is a global label and is defined as D0.
  • Page 615 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.18 Others Program examples 1. Program examples 1 In the program example below, the current value of the high speed counter C235 is compared in each operation cycle, and then the output Y000 is set to ON if the current value is "K500" or more (when the current value of C235 is not cleared.) [Structured ladder] [ST]...
  • Page 616 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.19 Block Data Operation 7.19 Block Data Operation 7.19.1 BK+ 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction adds binary block data. 1. Format and operation, execution form Expression in each language Instruction Execution Operation...
  • Page 617 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.19 Block Data Operation 3. Applicable devices Bit Devices Word Devices Others System Special Cons Real Character Operand System user Digit specification Index Pointer user unit tant Number String type X Y M T C S D .b KnX KnY KnM KnS T C D R U \G V Z Modifier K H...
  • Page 618 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.19 Block Data Operation 1) "2n" 32-bit binary data starting from the device specified by are added to "2n" 32-bit binary data starting from the device specified by , and the operation result is stored in "2n" points starting from the device specified by K1234 K4000...
  • Page 619 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.19 Block Data Operation Error An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is stored in D8067. 1) When "n" ("2n" in 32-bit operation) devices starting from the devices specified by and/or exceed the corresponding device range (error code: K6706).
  • Page 620 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.19 Block Data Operation 7.19.2 BK- 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction subtracts binary block data. 1. Format and operation, execution form Expression in each language Instruction Execution Operation name form...
  • Page 621 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.19 Block Data Operation Function and operation explanation 1. 16-bit operation (BK-/BK-P) Command input Head device storing subtraction data Head device storing operation result Subtracted constant or head device storing subtraction data Number of pieces of data 1) "n"...
  • Page 622 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.19 Block Data Operation 2. 32-bit operation (DBK-/DBK-P) Command DBK- input Label 1 Label 4 Label 2 Label 3 *1. This defines the head of the device that stores the subtraction data. *2.
  • Page 623 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.19 Block Data Operation Cautions 1) When underflow or overflow occurs in the operation result, the following processing is executed. At this time, the carry flag does not turn ON. a) In the case of 16-bit operation →...
  • Page 624 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.19 Block Data Operation 7.19.3 BKCMP=, BKCMP>, BKCMP<, BKCMP<>, BKCMP<=, BKCMP>= 3U(C) 2N(C) 1N(C) 0(S) Outline These instructions compare block data in the comparison condition set in each instruction. 1.
  • Page 625 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.19 Block Data Operation Expression in each language Instruction Execution Operation name form Structured ladder BKCMP<P BKCMP<P 16 bits Pulse BKCMP<P(EN,s1,s2,n,d); BKCMP<>P BKCMP<>P 16 bits Pulse BKCMP<>P(EN,s1,s2,n,d); BKCMP<=P BKCMP<=P 16 bits Pulse BKCMP<=P(EN,s1,s2,n,d);...
  • Page 626 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.19 Block Data Operation Expression in each language Instruction Execution Operation name form Structured ladder DBKCMP=P DBKCMP=P 32 bits Pulse DBKCMP=P(EN,s1,s2,n,d); DBKCMP>P DBKCMP>P 32 bits Pulse DBKCMP>P(EN,s1,s2,n,d); DBKCMP<P DBKCMP<P 32 bits Pulse DBKCMP<P(EN,s1,s2,n,d);...
  • Page 627 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.19 Block Data Operation Function and operation explanation 1. 16-bit operation (BKCMP=, BKCMP>, BKCMP<, BKCMP<>, BKCMP<=, BKCMP>=, BKCMP=P, BKCMP>P, BKCMP<P, BKCMP<>P, BKCMP<=P, BKCMP>=P) 1) "n" 16-bit binary data starting from the device specified by are compared with "n"...
  • Page 628 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.19 Block Data Operation 2. 32-bit operation (DBKCMP=, DBKCMP>, DBKCMP<, DBKCMP<>, DBKCMP<=, DBKCMP>=, DBKCMP=P, DBKCMP>P, DBKCMP<P, DBKCMP<>P, DBKCMP<=P, DBKCMP>=P) 1) "2n" 32-bit binary data starting from the device specified by are compared with "2n"...
  • Page 629 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.19 Block Data Operation Related device Device Name Description Turns ON when all comparison results are "ON (1)" in a block data instruction. M8090 Block comparison signal DBKCMP=, DBKCMP>, DBKCMP<, DBKCMP<>, DBKCMP<=, DBKCMP>= Cautions 1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the case of a simple project.
  • Page 630 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.19 Block Data Operation Program examples 1) In the program shown below, four 16-bit binary data starting from D100 are compared with four 16-bit binary data starting from D200 by BKCMP= instruction when X020 is set to ON, and the comparison result is stored in four points starting from M10.
  • Page 631 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control 7.20 Character String Control 7.20.1 STR 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts binary data into character strings (ASCII codes). On the other hand, the ESTR instruction converts floating point data into character strings. 1.
  • Page 632 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Function and operation explanation 1. 16-bit operation (STR/STRP) 1) All digits (specified by ) of 16-bit binary data of the device specified by are converted into character string while the decimal point is added to the position specified by the device storing the number of digits of the decimal part ( + 1), and stored in the device specified by...
  • Page 633 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control 5) Converted character string data is stored in and later as shown below. a) As the sign, "space" (20H) is stored when the 16-bit binary data stored in is positive, and "-"...
  • Page 634 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control 2. 32-bit operation (DSTR/DSTRP) 1) All digits (specified by ) of 32-bit binary data stored in the device specified by are converted into ASCII codes while the decimal point is added to the position specified by the device storing the number of digits of the decimal part ( + 1), and stored in the device specified by and later.
  • Page 635 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control 5) Converted character string data is stored in and later as shown below. a) For the sign, "space" (20H) is stored when the 32-bit binary data stored in is positive, and "-"...
  • Page 636 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Related instruction Instruction Description DESTR Converts binary floating point data into a character string (ASCII codes) with a specified number of digits. DEVAL Converts a character string (ASCII codes) into binary floating point data. Converts a character string (ASCII codes) into binary data.
  • Page 637 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Program examples In the program below, the 16-bit binary data stored in D10 is converted into a character string in accordance with the digit specification by D0 and D1 when X000 is set to ON, and then stored in D20 to D23. [Structured ladder] [ST] MOVP(X000,K12672,D10);...
  • Page 638 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control 7.20.2 VAL 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts a character string (ASCII codes) into binary data. On the other hand, EVAL instruction converts a character string (ASCII codes) into floating point data. 1.
  • Page 639 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Function and operation explanation 1. 16-bit operation (VAL/VALP) 1) A character string stored in the device specified by and later is converted into 16-bit binary data. The number of all digits of the binary data acquired by conversion is stored in the device specified by , the number of digits of the decimal part is stored in the device specified by + 1, and the...
  • Page 640 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control 3) The device specified by stores the number of all digits. The number of all digits indicates the number of all characters (including the number, sign and decimal point). 4) The device specified by + 1 stores the number of digits of the decimal part.
  • Page 641 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control 2) Character string to be converted a) Number of characters of character string and the numeric range when the decimal point is ignored. Description Number of all characters (digits) 2 to 13 Number of characters (digits) of decimal part 0 to 10 and smaller than "number of all digits - 3"...
  • Page 642 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Error An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is stored in D8067. 1) When the number of characters of the character string to be converted (device specified by later) is outside the following ranges.
  • Page 643 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Program examples 1) In the program below, the character string data stored in D20 to D22 is regarded as an integer value, converted into a binary value, and stored in D0 when X000 is set to ON. [ Structured ladder] [ST] VAR_02:=VALP(X000,VAR_01);...
  • Page 644 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control 7.20.3 $+ 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction links a character string to another character string. 1. Format and operation, execution form Expression in each language Instruction Execution Operation...
  • Page 645 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Function and operation explanation 1. 16-bit operation ($+/$+P) The character string data stored in the device specified by and later is linked to the end of the character string data stored in the device specified by and later, and the linked data is stored to devices starting from the device specified by...
  • Page 646 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Program examples In the program example shown below, a character string stored in D10 to D12 (abcde) is linked to the character string "ABCD", and the result is stored to D100 and later when X000 turns ON. [ST] [Structured ladder] VAR_03:=$+(X000,VAR_01,VAR_02);...
  • Page 647 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control 7.20.4 LEN 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction detects the number of characters (bytes) of a specified character string. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 648 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Function and operation explanation 1. 16-bit operation (LEN/LENP) The length of a character string stored in the device specified by and later is detected, and stored to the device specified by .
  • Page 649 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Program examples In the program example shown below, the length of a character string stored in D0 and later is output in 4-digit BCD to Y040 to Y057 when X000 turns ON. [Structured ladder] [ST] LEN(X000,D0,D10);...
  • Page 650 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control 7.20.5 RIGHT 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction extracts a specified number of characters from the right end of a specified character string. → For handling of character strings, refer to "FX Structured Programming Manual (Device & Common)."...
  • Page 651 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Function and operation explanation 1. 16-bit operation (RIGHT/RIGHTP) "n" characters are extracted from the right end (that is, from the end) of the character string data stored in the device specified by and later, and stored to the device specified by and later.
  • Page 652 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Cautions 1) When handling character string data in a structured program, a 16-bit device cannot be specified directly as in the case of a simple project. Use a label to handle character string data. Use a global label to specify a device.
  • Page 653 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control 7.20.6 LEFT 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction extracts a specified number of characters from the left end of a specified character string. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 654 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Function and operation explanation 1. 16-bit operation (LEFT/LEFTP) "n" characters are extracted from the left end (that is, from the head) of the character string data stored in the device specified by and later and stored to the device specified by and later.
  • Page 655 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Cautions 1) When handling character string data in a structured program, a 16-bit device cannot be specified directly as in the case of a simple project. Use a label to handle character string data. Use a global label to specify a device.
  • Page 656 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control 7.20.7 MIDR 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction extracts a specified number of characters from arbitrary positions of a specified character string. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 657 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Function and operation explanation 1. 16-bit operation (MIDR/MIDRP) " + 1" characters are extracted leftward from the position specified by of the character string data stored in the device specified by and later, and stored to the device specified by and later.
  • Page 658 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Cautions 1) When handling array data or character string data in a structured program, a 16-bit device cannot be specified directly as in the case of a simple project. Use a label to handle array data or character string data.
  • Page 659 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Program examples In the program example shown below, four characters are extracted from the third character from the left end of the character string data stored in D10 and later, and then stored to D0 and later when X000 turns ON. [Structured ladder] [ST] VAR_03:=MIDR(X000,VAR_01,VAR_02);...
  • Page 660 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control 7.20.8 MIDW 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction replaces the characters in arbitrary positions inside designated character string with a specified character string. → For handling of character strings, refer to "FX Structured Programming Manual (Device & Common)."...
  • Page 661 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Function and operation explanation 1. 16-bit operation (MIDW/MIDWP) Character data specified by " + 1" are extracted from the left end (that is, the head) of the character string data stored in the device specified by and later, and stored to the position specified by and later of...
  • Page 662 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control 4) When " + 1" (the number of characters to be overwritten) is "-1", the entire character string stored in and later is stored to the device specified by and later.
  • Page 663 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Program examples In the program example shown below, four characters are extracted from the character string data stored in D0 and later, and stored to the third character (from the left end) and later for the character string data stored in D100 and later when X010 turns ON.
  • Page 664 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control 7.20.9 INSTR 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction searches a specified character string within another character string. 1. Format and operation, execution form Expression in each language Instruction Execution Operation...
  • Page 665 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Function and operation explanation 1. 16-bit operation (INSTR/INSTRP) 1) The character string stored in the device specified by and later is searched for within the character string of the device specified by and later.
  • Page 666 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Error An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is stored in D8067. 1) When the search start position "n" exceeds the number of characters stored in (Error code: K6706) 2) When "00H (NULL)"...
  • Page 667 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control 7.20.10 $MOV 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction transfers character string data. 1. Format and operation, execution form Expression in each language Instruction Execution Operation name form...
  • Page 668 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Function and operation explanation 1. 16-bit operation ($MOV/$MOVP) The character string data stored in the device specified by and later is transferred to the device specified and later.
  • Page 669 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.20 Character String Control Cautions 1) When handling character string data in a structured program, a 16-bit device cannot be specified directly as in the case of a simple project. Use a label to handle character string data. Use a global label to specify a device.
  • Page 670 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.21 Data Operation 3 7.21 Data Operation 3 7.21.1 FDEL 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction deletes an arbitrary piece of data from a data table. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 671 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.21 Data Operation 3 Function and operation explanation 1. 16-bit operation (FDEL/FDELP) "n"th data is deleted from a data table (stored in the device specified by and later), and the deleted data is stored in the device specified by .
  • Page 672 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.21 Data Operation 3 Program examples In the program example shown below, the second data is deleted from the data table stored in D100 to D105, and the deleted data is stored in D0 when X010 is set to ON. When the amount of data stored is "0", however, the FDEL instruction is not executed.
  • Page 673 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.21 Data Operation 3 7.21.2 FINS 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction inserts data into an arbitrary position in a data table. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 674 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.21 Data Operation 3 Function and operation explanation 1. 16-bit operation (FINS/FINSP) 1) 16-bit data of the device specified by is inserted in "n"th position in a data table (stored in the device specified by and later).
  • Page 675 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.21 Data Operation 3 Program examples In the program example shown below, data stored in D100 is inserted into the third position of the data table stored in D0 to D4 when X010 is set to ON. When the amount of data stored exceeds "7", however, the FINS instruction is not executed.
  • Page 676 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.21 Data Operation 3 7.21.3 POP 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction reads the last data written by the shift write (SFWR) instruction for the first-in first-out and first- in last-out control 1.
  • Page 677 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.21 Data Operation 3 Function and operation explanation 1. 16-bit operation (POP/POPP) Command input Head device storing the first-in data Device storing last-out data Number of pieces of data stored Data for FILO control Description Pointer data (amount of data stored)
  • Page 678 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.21 Data Operation 3 Related instruction Instruction Description SFWR Shift write [for FIFO/FILO control] SFRD Shift read [for FIFO control] Cautions 1) When this instruction is programmed in the continuous operation type, the instruction is executed in every operation cycle.
  • Page 679 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.21 Data Operation 3 Program examples In the program example shown below, among value stored in D20 input first to D101 to D106, the last value input is stored to D10, and "1" is subtracted from the number of stored data (pointer D100) every time X000 turns ON.
  • Page 680 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.21 Data Operation 3 7.21.4 SFR 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction shifts 16 bits stored in a word device rightward by "n" bits. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 681 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.21 Data Operation 3 Function and operation explanation 1. 16-bit operation (SFR/SFRP) Command input Number of times Device storing data to be shifted. of shift 1) 16 bits stored in a word device specified by are shifted rightward by "n"...
  • Page 682 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.21 Data Operation 3 Program examples In the program example shown below, the contents of Y010 to Y023 are shifted rightward by the number of bits specified by D0 when X020 turns ON. [Structured ladder] [ST] SFR(X020,D0,Y3Y010);...
  • Page 683 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.21 Data Operation 3 7.21.5 SFL 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction shifts 16 bits stored in a word device leftward by "n" bits. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 684 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.21 Data Operation 3 Function and operation explanation 1. 16-bit operation (SFL/SFLP) Command input Number of times Device storing data to be shifted. of shift 1) 16 bits stored in a word device specified by are shifted leftward by "n"...
  • Page 685 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.21 Data Operation 3 Program examples In the program example shown below, the contents of Y010 to Y017 are shifted leftward by the number of bits specified by D0 when X020 turns ON. [Structured ladder] [ST] SFLP(X020,D0,K2Y10);...
  • Page 686 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.22 Data Comparison 7.22 Data Comparison 7.22.1 LD=, LD>, LD<, LD<>, LD<=, LD>= 3U(C) 2N(C) 1N(C) 0(S) Outline These instructions compare numeric values, and set a contact to ON when the condition agrees so that an operation started.
  • Page 687 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.22 Data Comparison Expression in each language Instruction Execution Operation name form Structured ladder LDD<> LDD<> 32 bits Continuous LDD<>(EN,s1,s2); LDD<= LDD<= 32 bits Continuous LDD<=(EN,s1,s2); LDD>= LDD>= 32 bits Continuous LDD>=(EN,s1,s2);...
  • Page 688 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.22 Data Comparison Function and operation explanation These data comparison instructions are connected to bus lines. The contents of the devices specified by are compared with the contents of the device specified by in the binary format, and a contact becomes conductive (ON) or non-conductive (OFF) depending on the comparison result.
  • Page 689 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.22 Data Comparison Program examples [Structured ladder] [ST] When the current value of the counter C10 is "200", Y010 is driven. Y10:=LD=(TRUE,K200,C10); K200 When the contents of D200 are "-29" or more and X001 is ON, Y011 is set.
  • Page 690 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.22 Data Comparison 7.22.2 AND=, AND>, AND<, AND<>, AND<=, AND>= 3U(C) 2N(C) 1N(C) 0(S) Outline These instructions compare numeric values, and set a contact to ON when the condition agrees. 1.
  • Page 691 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.22 Data Comparison Expression in each language Instruction Execution Operation name form Structured ladder ANDD<> ANDD<> 32 bits Continuous ANDD<>(EN,s1,s2); ANDD<= ANDD<= 32 bits Continuous ANDD<=(EN,s1,s2); ANDD>= ANDD>= 32 bits Continuous ANDD>=(EN,s1,s2);...
  • Page 692 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.22 Data Comparison Function and operation explanation These data comparison instructions are connected to other contacts in series. The contents of the device specified by are compared with the contents of the device specified by in binary format, and a contact becomes conductive (ON) or non-conductive (OFF) depending on the comparison result.
  • Page 693 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.22 Data Comparison Program examples [Structured ladder] [ST] When X000 is ON and the current value of the counter C10 is "200" Y010 is driven. AND= X000 Y10:=AND=(X000,K200,C10); K200 When X001 is OFF and the contents of the data register D0 are not "-10", Y011 is set.
  • Page 694 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.22 Data Comparison 7.22.3 OR=, OR>, OR<, OR<>, OR<=, OR>= 3U(C) 2N(C) 1N(C) 0(S) Outline These instructions compare numeric values, and set a contact to ON when the condition agrees. 1.
  • Page 695 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.22 Data Comparison Expression in each language Instruction Execution Operation name form Structured ladder ORD> ORD> 32 bits Continuous ORD>(EN,s1,s2); ORD< ORD< 32 bits Continuous ORD<(EN,s1,s2); OR<> OR<> 32 bits Continuous OR<>(EN,s1,s2);...
  • Page 696 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.22 Data Comparison Function and operation explanation These data comparison instructions are connected to other contacts in parallel. The contents of the device specified by is compared with the contents of the device specified by binary format, and a contact becomes conductive (ON) or non-conductive (OFF) depending on the comparison result.
  • Page 697 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation 7.23 Data Table Operation 7.23.1 LIMIT 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction provides the upper limit value and lower limit value for an input numeric value, and control the output value using these limit values.
  • Page 698 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation 3. Applicable devices Bit Devices Word Devices Others System Special Cons Real Character Operand System user Digit specification Index Pointer user unit tant Number String type X Y M T C S D .b KnX KnY KnM KnS T C D R U \G V Z Modifier K H...
  • Page 699 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation 2. 32-bit operation (DLIMIT/DLIMITP) Depending on how the input value (32-bit binary value) of the device specified by compares to the range between the upper and lower limits specified by , the output value to be stored in the device specified by is controlled.
  • Page 700 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation Program example 1. Program example 1 In the program example shown below, the BCD data set in X020 to X037 is controlled by the limit values "500"...
  • Page 701 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation 2. Program example 2 In the program example shown below, the BCD data set in X020 to X057 is controlled by the limit values "10000" and "1,000,000", and the controlled value is output to D11 and D10 when X000 turns ON. [Structured ladder] [ST] DBIN(X000,VAR_01,VAR_02):...
  • Page 702 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation 7.23.2 BAND 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction provides the upper limit value and lower limit value of the dead band for an input numeric value, and controls the output value using these limit values.
  • Page 703 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation 3. Applicable devices Bit Devices Word Devices Others System Special Cons Real Character Operand System user Digit specification Index Pointer user unit tant Number String type X Y M T C S D .b KnX KnY KnM KnS T C D R U \G V Z Modifier K H...
  • Page 704 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation 2. 32-bit operation (DBAND/DBANDP) Depending on how the input value (32-bit binary value) specified by compares to the upper and lower limit dead band range between the devices specified by , the output value to be stored in the device specified by is controlled.
  • Page 705 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation Cautions 1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the case of a simple project. Use a label to handle 32-bit data. A 32-bit counter can be specified directly as it is a 32-bit long device.
  • Page 706 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation Program example 1. Program example 1 In the program example shown below, the BCD data set in X020 to X037 is controlled by the dead band from "-1000"...
  • Page 707 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation 2. Program example 2 In the program example shown below, the BCD data set in X020 to X057 is controlled by the dead band from "-10000"...
  • Page 708 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation 7.23.3 ZONE 3U(C) 2N(C) 1N(C) 0(S) Outline Depending on whether the input value is positive or negative, the output value is controlled by the bias value specified.
  • Page 709 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation Function and operation explanation 1. 16-bit operation (ZONE/ZONEP) The bias value specified by is added to the input value specified by , and output to the device specified by The bias value is added as shown below.
  • Page 710 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation 2. 32-bit operation (DZONE/DZONEP) The bias value specified by is added to the input value of the device specified by , and output to the device specified by The bias value is added as shown below: X000 DZONE...
  • Page 711 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation Cautions 1) When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the case of a simple project. Use a label to handle 32-bit data. A 32-bit counter can be specified directly as it is a 32-bit long device.
  • Page 712 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation Program example 1. Program example 1 In the program example shown below, the BCD data set in X020 to X037 is controlled by the zone from "-1000"...
  • Page 713 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation 2. Program example 2 In the program example below, the BCD data set in X020 to X057 is controlled by the zone from "-10000" to "10000", and the controlled value is output to D11 and D10 when X000 turns ON.
  • Page 714 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation 7.23.4 SCL 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction executes scaling of the input value using a specified data table, and outputs the result. SCL2 is also available with a different data table configuration for scaling. →...
  • Page 715 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation Function and operation explanation 1. 16-bit operation (SCL/SCLP) The input value of the device specified by is processed by scaling for the specified conversion characteristics, and stored to a device number specified by .
  • Page 716 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation 2. 32-bit operation (DSCL/DSCLP) The input value specified by is processed by scaling for the specified conversion table, and stored to a device number specified in .
  • Page 717 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation 4. Setting example of the conversion table for scaling A setting example for the 16-bit operation is shown below. For the 32-bit operation, set each item using a 32-bit binary value. In the case of the conversion characteristics for scaling shown in the figure below, set the following data table.
  • Page 718 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation Cautions When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the case of a simple project. Use a label to handle 32-bit data. A 32-bit counter can be specified directly as it is a 32-bit long device.
  • Page 719 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation 7.23.5 DABIN 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts numeric data expressed in decimal ASCII codes (30H to 39H) into binary data. 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 720 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation Function and operation explanation 1. 16-bit operation (DABIN/DABINP) 1) Data expressed in decimal ASCII codes (30H to 39H) and stored in the device specified by converted into 16-bit binary data, and stored in the device specified by Command DABIN...
  • Page 721 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation 2. 32-bit operation (DDABIN/DDABINP) 1) Data expressed in decimal ASCII codes (30H to 39H) and stored in the device specified by converted into 32-bit binary data, and stored in the device specified by Command DDABIN_P input...
  • Page 722 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation Error An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is stored in D8067. 1) When the sign data is any value other than "20H (space)" or "2DH (-)". (Error code: K6706) 2) When an ASCII code for each digit stored in + 2 (5) is any value other than "30H"...
  • Page 723 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation 7.23.6 BINDA 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction converts binary data into decimal ASCII codes (30H to 39H). 1. Format and operation, execution form Expression in each language Instruction Execution...
  • Page 724 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation Function and operation explanation 1. 16-bit operation (BINDA/BINDAP) 1) Each digit of 16-bit binary data stored in the device specified by is converted into an ASCII code (30H to 39H), and stored in the device specified by and later.
  • Page 725 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation 2. 32-bit operation (DBINDA/DBINDAP) 1) Each digit of 32-bit binary data stored in the device specified by is converted into an ASCII code (30H to 39H), and stored in the device specified by and later.
  • Page 726 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation Related devices Device Name Description • For 16-bit operation When M8091 is OFF, + 3 is set to "0000H (NULL)". When M8091 is ON, + 3 does not change. Output character quantity M8091 selector signal...
  • Page 727 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation Program example In the program example below, 16-bit binary data stored in D1000 is converted into decimal ASCII codes when X000 is set to ON, and the ASCII codes converted by PR (FNC77) instruction are output one by one in the time division method to Y040 to Y051.
  • Page 728 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation 7.23.7 SCL2 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction executes scaling of the input value using a specified data table, and outputs the result. SCL instruction is also available with a different data table configuration for scaling. →...
  • Page 729 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation Function and operation explanation 1. 16-bit operation (SCL2/SCL2P) The input value specified in is processed by scaling for the specified conversion characteristics, and stored to a device number specified in .
  • Page 730 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation 2. 32-bit operation (DSCL2/DSCL2P) The input value specified by is processed by scaling for the specified conversion table, and stored to a device number specified in .
  • Page 731 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation 3. Setting the conversion table for scaling The conversion table for scaling is set based on the data table stored in a device specified in and later.
  • Page 732 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation Setting example of the conversion table for scaling A setting example for the 16-bit operation is shown below. For the 32-bit operation, set each item using a 32-bit binary value. In the case of the conversion characteristics for scaling shown in the figure below, set the following data table.
  • Page 733 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.23 Data Table Operation Cautions When handling 32-bit data in a structured program, a 16-bit device cannot be specified directly as in the case of a simple project. Use a label to handle 32-bit data. A 32-bit counter can be specified directly as it is a 32-bit long device.
  • Page 734 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.24 External Device Communication (Inverter 7.24 External Device Communication (Inverter Communication) 7.24.1 IVCK 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction reads the operation status of an inverter to a PLC using the computer link operation function of the inverter.
  • Page 735 Device storing the read value Inverter instruction code Channel to be used Mitsubishi Electric's FREQROL - F700, A700, E700, D700, V500, F500, A500, E500 and S500 series general purpose inverters Refer to the instruction code list. Refer to the pages in the inverter manual on which the computer link function is explained in detail.
  • Page 736 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.24 External Device Communication (Inverter Cautions → For other cautions, refer to the Data Communication Edition manual. 1) The instruction is provided in the FX PLC Ver. 1.10 or later. 2) It is not permitted to use the RS and RS2 instructions and an inverter communication instruction (IVCK, IVDR, IVRD, IVWR and IVBWR) for the same port.
  • Page 737 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.24 External Device Communication (Inverter 7.24.2 IVDR 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction writes a inverter operation required control value to the PLC using the computer link operation function of the inverter.
  • Page 738 Set value to be written to the inverter parameter or device storing the data to be set. Channel to be used Mitsubishi Electric's FREQROL - F700, A700, E700, D700, V500, F500, A500, E500 and S500 series general purpose inverters Refer to the instruction code list.
  • Page 739 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.24 External Device Communication (Inverter Cautions → For other cautions, refer to the Data Communication Edition manual. 1) The instruction is provided in the FX PLC Ver. 1.10 or later. 2) It is not permitted to use the RS and RS2 instructions and an inverter communication instruction (IVCK, IVDR, IVRD, IVWR and IVBWR) for the same port.
  • Page 740 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.24 External Device Communication (Inverter 7.24.3 IVRD 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction reads an inverter parameter to the PLC using the computer link operation function of the inverter.
  • Page 741 Device storing the read value Inverter parameter number Channel to be used Mitsubishi Electric's FREQROL - F700, A700, E700, D700, V500, F500, A500, E500 and S500 series general purpose inverters 2. Related devices → For the instruction execution complete flag use method, refer to Section 1.3.4.
  • Page 742 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.24 External Device Communication (Inverter 7.24.4 IVWR 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction writes a parameter of an inverter using the computer link operation function of the inverter. This instruction corresponds to the EXTR (K13) instruction in the FX and FX series PLCs.
  • Page 743 Set value to be written to the inverter parameter or device storing the data to be set Channel to be used Mitsubishi Electric's FREQROL - F700, A700, E700, D700, V500, F500, A500, E500 and S500 series general purpose inverters 2. Related devices →...
  • Page 744 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.24 External Device Communication (Inverter 7.24.5 IVBWR 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction writes parameters of an inverter at one time using the computer link operation function of the inverter.
  • Page 745 Head address of a parameter table to be written to an inverter Channel to be used Mitsubishi Electric's FREQROL - F700, A700, E700, D700, V500, F500, A500, E500 and S500 series general purpose inverters The table below shows the data table format.
  • Page 746 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.24 External Device Communication (Inverter Applicable models depending on the PLC version Available inverter models are added depending on the version, as shown in the table below. Applicable version Item Outline of function Addition of...
  • Page 747 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.25 Data Transfer 3 7.25 Data Transfer 3 7.25.1 RBFM 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction reads data from continuous buffer memories (BFM) in a special function block and unit over several operation cycles by the time division method.
  • Page 748 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.25 Data Transfer 3 Function and operation explanation 1. 16-bit operation (RBFM) "n1" buffer memory (BFM) units at location No. "m2" in special function block/unit No. "m1" are transferred (read) to the device specified by in the PLC.
  • Page 749 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.25 Data Transfer 3 Common items between RBFM instruction and WBFM instruction Specification of unit number of special function block and unit and buffer memory → For the connection method of special extension units and blocks, number of connectable units and blocks, and handling of I/O numbers, refer to the manual of the PLC used and special function block and unit.
  • Page 750 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.25 Data Transfer 3 Cautions 1) A watchdog timer error may occur when many numbers of points are transferred in one operation cycle. In such a case, take either of the following countermeasures. a) Change the watchdog timer time By overwriting the contents of D8000 (watchdog timer time), the watchdog timer detection time is changed (initial value: K200).
  • Page 751 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.25 Data Transfer 3 Program example In the program example shown below, data is read from and written to the buffer memories (BFM) in the unit No. 2 as follows: 1) When X000 is set to ON, data stored in D100 to D179 (80 points) are written to the buffer memories (BFM) #1001 to #1080 in the special function block and unit whose unit number is No.
  • Page 752 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.25 Data Transfer 3 2) When X001 is set to ON, the buffer memories (BFM) #2001 to #2080 (80 points) in the special function block and unit whose unit number is No. 2 are written to D200 to D279 by 16 points in each operation cycle.
  • Page 753 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.25 Data Transfer 3 7.25.2 WBFM 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction writes data to continuous buffer memories (BFM) in a special function block and unit over several operation cycles by the time division method. This instruction is convenient for writing send data, etc. to buffer memories in a special function block and unit for communication by the time division method.
  • Page 754 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.25 Data Transfer 3 Function and operation explanation 1. 16-bit operation (WBFM) "n1" word units from the device specified by in the PLC are transferred (written) to buffer memory (BFM) location No.
  • Page 755 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.26 High Speed Processing 2 7.26 High Speed Processing 2 7.26.1 DHSCT 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction compares the current value of a high speed counter with a data table of comparison points, and then sets or resets up to 16 output devices.
  • Page 756 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.26 High Speed Processing 2 Function and operation explanation 1. 32-bit operation (DHSCT) The current value of a high speed counter specified in is compared with the data table shown below which has "m"...
  • Page 757 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.26 High Speed Processing 2 Operation example DHSCT X010 Y010 VAR_01 CN235 M8000 DHSCR VAR_02 CC235 CN235 *1. VAR_01 is a global label and is defined as D200. *2. VAR_02 is a global label and is defined as K900. Comparison data SET/RESET pattern Comparison...
  • Page 758 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.26 High Speed Processing 2 2. Related devices Device Name Description M8138 DHSCT Instruction execution complete flag Turns ON when the operation for the final table No. "m-1" is completed. D8138 DHSCT Table counter Stores the comparison point number handled as the comparison target.
  • Page 759 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.26 High Speed Processing 2 Program example In the program example shown below, the current value of C235 (counting X000) is compared with the comparison data table set in R0 and later, and a specified pattern is output to Y010 to Y013. [Structured ladder] [ST] C235 is used as an up counter.
  • Page 760 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.26 High Speed Processing 2 Current value of C235 Time Y010 OFF ON Y011 Y012 Y013 ON OFF Table counter 8136...
  • Page 761 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control 7.27 Extension File Register Control 7.27.1 LOADR 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction reads the current values of extension file registers (ER) stored in a memory cassette (flash memory and EEPROM) or the file registers (ER) in the PLC's built-in EEPROM, and transfers them to extension registers (R) stored in the PLC's built-in RAM.
  • Page 762 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control Function and operation explanation 1. 16-bit operation (LOADR/LOADRP) Command LOADRP input Device of extension register to which data is to be transferred Number of points to be read (transferred) 1) For the FX and FX PLCs...
  • Page 763 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control b) When not connecting to a memory cassette The contents (current values) of extension file registers (ER) stored in PLC's built-in EEPROM having the same numbers with the extension registers specified by +n-1 are read, and transferred to the extension registers (R) specified by +n-1 stored in the PLC's built-in...
  • Page 764 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control Error An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is stored in D8067. 1) When the last device number to be transferred exceeds "32767"...
  • Page 765 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control 7.27.2 SAVER 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction writes the current values of extension registers (R) stored in the PLC's built-in RAM to extension file registers (ER) stored in a memory cassette (flash memory) in units of sector (2048 points).
  • Page 766 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control Function and operation explanation 1. 16-bit operation (SAVER) The contents (current values) of 2,048 extension registers (R) starting from the device specified by written (transferred) to extension file registers (ER) inside a memory cassette (flash memory) having the same device numbers in "2048/n"...
  • Page 767 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control Cautions 1. Cautions on writing data to a memory cassette Memory cassettes adopt flash memory. Note the following contents when writing data to extension file registers in a memory cassettes with the SAVER instruction.
  • Page 768 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control [2] When storing data of 2048 extension registers (R) in one sector to extension file registers (ER) a) Temporarily withdraw the data of extension registers (R) specified as targets in SAVER instruction to data registers or unused 2048 extension registers (R) by using BMOV instruction.
  • Page 769 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control Program example 1) In the case of FX PLCs Ver. 1.30 or later and FX PLCs Ver. 2.20 or later In the program example shown below, the changed contents of extension registers R10 to R19 (sector 0) used for setting data are reflected on the extension file registers (ER) when X000 is set to ON.
  • Page 770 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control Setting data Setting backup data Number of Extension registers (R) Extension file registers (ER) already written Current Current Device number Device number points (D0) value value K100...
  • Page 771 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control 2) In the case of FX PLCs former than Ver. 1.30 In the program example shown below, the changed contents of the extension registers R10 to R19 (sector 0) used for setting data are reflected on extension file registers (ER) when X000 is set to ON.
  • Page 772 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control Operation example Setting data Setting backup data Temporarily withdrawn data Extension registers (R) Extension file registers (ER) Unused extension registers Current Current Current Device number Device number Device number value...
  • Page 773 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control Setting data Setting backup data Setting data Extension registers (R) Extension file registers (ER) Unused extension registers Current Current Current Device number Device number Device number value value...
  • Page 774 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control 7.27.3 INITR 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction initializes (to "HFFFF <K-1>") extension registers (R) in the RAM built in a PLC and extension file registers in a memory cassette (flash memory) before data logging by LOGR instruction.
  • Page 775 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control Function and operation explanation 1. 16-bit operation (INITR/INITRP) "n" sectors of extension registers in the PLC's built-in RAM starting from the one specified by and "n"...
  • Page 776 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control Cautions 1. Initializing two or more sectors When a memory cassette is attached, 18 ms is required to initialize one sector. (When a memory cassette is not attached, only 1 ms is required to initialize one sector.) When initializing two or more sectors, take either measures shown below.
  • Page 777 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control Error An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is stored in D8067. 1) When any device number other than the head device number of a sector of extension file registers is set (Error code: K6706) 2) When a device number to be initialized exceeds "32767".
  • Page 778 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control 7.27.4 LOGR 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction logs specified devices, and stores the logged data to extension registers (R) and extension file registers (ER) in a memory cassette. 1.
  • Page 779 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control Function and operation explanation 1. 16-bit operation (LOGR/LOGRP) While the instruction is driven, "m" devices starting from the device specified by are logged until "n" sectors of extension registers (R) starting from the device specified by and extension file registers (ER) in a memory cassette are filled.
  • Page 780 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control Cautions 1. About LOGR instruction LOGR instruction executes logging in each operation in the continuous operation type. When logging should be executed only once by one input, use the pulse operation type. 2.
  • Page 781 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control Program example In the program example shown below, D1 and D2 are logged to the area from R2048 to R6143 every time X001 turns ON. [Structured ladder] [ST] LOGR(X001,D1,K2,K2,R2048,D100);...
  • Page 782 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control 7.27.5 RWER 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction writes the current values of an arbitrary number of extension registers (R) in the PLC's built-in RAM to extension file registers (ER) in a memory cassette (flash memory or EEPROM) or to the extension file registers (ER) in the PLC's built-in EEPROM.
  • Page 783 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control Function and operation explanation 1. 16-bit operation (RWER) Command RWERP input Device of extension register storing data Number of written (transferred) devices 1) For the FX and FX PLCs The contents (current values) of "n"...
  • Page 784 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control Cautions 1. Cautions on writing data to the memory cassette (flash memory) for the FX and FX PLCs Memory cassettes adopt flash memory. Note the following contents when writing data to extension file registers in a memory cassette with the RWER instruction.
  • Page 785 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control 2. Cautions on writing data to the memory cassette (EEPROM) for the FX PLCs Memory cassettes adopt EEPROM. Note the following contents when writing data to extension file registers in a memory cassette with the RWER instruction.
  • Page 786 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control Program example In the program example shown below, the changed contents of extension registers R10 to R19 (sector 0) used for setting data are reflected on extension file registers (ER) when X000 turns ON. Program [Structured ladder] [ST]...
  • Page 787 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control 7.27.6 INITER 3U(C) 2N(C) 1N(C) 0(S) Outline This instruction initializes extension file registers (ER) to "HFFFF" (<K-1>) in a memory cassette (flash memory) before executing the SAVER instruction. Because the INITER instruction is not supported in FX PLCs earlier than Ver.
  • Page 788 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control Function and operation explanation 1. 16-bit operation (INITER/INITERP) "n" sectors of extension file registers (ER) in a memory cassette (flash memory) with the same device number as the device specified by are initialized (initial value "HFFFF"...
  • Page 789 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control Cautions 1. About 25 ms is required to initialize one sector. When initializing two or more sectors, take either measure shown below. 1) Set a large value to the watchdog timer D8000 using the following program. Initial pulse M8002 D8000...
  • Page 790 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.27 Extension File Register Control Error An operation error is caused in the following cases. The error flag M8067 turns ON, and the error code is stored in D8067. 1) When any device number other than the head device number of a sector of extension file registers (ER) is set to (Error code: K6706)
  • Page 791 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.28 FX3U-CF-ADP 7.28 -CF-ADP 7.28.1 FLCRT 3U(C) 2N(C) 1N(C) 0(S) Outline The FLCRT instruction creates a file inside the CompactFlash card mounted in the FX -CF-ADP. When executed after creation of a new file, the FLCRT instruction checks the association with the file ID, and evaluates it.
  • Page 792 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.28 FX3U-CF-ADP Function and operation explanation 1. 16-bit operation (FLCRT) FLCRT Command input File ID File name File creation parameter Used channel number 1) When the file ID is "K0" When is "K0", the FLCRT instruction creates a FIFO file.
  • Page 793 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.28 FX3U-CF-ADP Detailed explanation of setting data Details of the setting data in the FLCRT instruction are as shown below. Setting items Description Data Type File ID This ID number is associated with the file name. The FLCRT instruction creates a file, and associates the file name with the file ID at ANY16 the same time.
  • Page 794 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.28 FX3U-CF-ADP Cautions 1) When the file ID is "K0" a) The CF-ADP can create up to 1000 files (within the CompactFlash card capacity). b) The file name is set to "FILE0000.CSV" to "FILE0999.CSV". 2) When the file ID is "K1"...
  • Page 795 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.28 FX3U-CF-ADP 7.28.2 FLDEL 3U(C) 2N(C) 1N(C) 0(S) Outline The FLDEL instruction deletes files stored in the CompactFlash card, or formats the CompactFlash card. → As for explanation of the instruction, see the FX -CF-ADP User's Manual.
  • Page 796 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.28 FX3U-CF-ADP Function and operation explanation 1. 16-bit operation (FLDEL) FLDEL Command input File ID File delete method Used channel number The FLDEL instruction deletes files stored in the CompactFlash card, or formats the CompactFlash card in the following method.
  • Page 797 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.28 FX3U-CF-ADP 7.28.3 FLWR 3U(C) 2N(C) 1N(C) 0(S) Outline The FLWR instruction writes data to the CompactFlash card or to the buffer inside the FX -CF-ADP. → As for explanation of the instruction, see the FX -CF-ADP User's Manual.
  • Page 798 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.28 FX3U-CF-ADP Function and operation explanation 1. 16-bit operation (FLWR) FLWR Command input File ID Position after data writing Head of devices which store data to be written Data write parameter Used channel number The FLWR instruction writes data specified by the device to a file stored in the CompactFlash...
  • Page 799 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.28 FX3U-CF-ADP Detailed explanation of setting data Details of the setting data in the FLWR instruction are as shown below. Setting items Description Data Type File ID ANY16 K0 to K63 Head of devices which store data to be written.
  • Page 800 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.28 FX3U-CF-ADP 7.28.4 FLRD 3U(C) 2N(C) 1N(C) 0(S) Outline The FLRD instruction reads data from the CompactFlash card. → As for explanation of the instruction, see the FX -CF-ADP User's Manual. 1.
  • Page 801 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.28 FX3U-CF-ADP Detailed explanation of setting data Details of the setting data in the FLRD instruction are as shown below. Setting items Description Data Type File ID ANY16 K0 to K63 Specify the data reading type K0 : Mixed type K1 : Bit type...
  • Page 802 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.28 FX3U-CF-ADP 7.28.5 FLCMD 3U(C) 2N(C) 1N(C) 0(S) Outline The FLCMD instruction gives instruction for operation to the FX -CF-ADP. → As for explanation of the instruction, see the FX -CF-ADP User's Manual.
  • Page 803 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.28 FX3U-CF-ADP Detailed explanation of setting data Details of the setting data in the FLCMD instruction are as shown below. Setting items Description Data Type Contents of instruction for operation K-1 : Forcibly writes all buffered data to the CompactFlash card.
  • Page 804 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.28 FX3U-CF-ADP 7.28.6 FLSTRD 3U(C) 2N(C) 1N(C) 0(S) Outline The FLSTRD instruction reads the status (including the error information and file information) of the FX CFADP. → As for explanation of the instruction, see the FX -CF-ADP User's Manual.
  • Page 805 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.28 FX3U-CF-ADP Detailed explanation of setting data Details of the setting data in the FLSTRD instruction are as shown below. Setting items Description Data Type Contents of status to be read K0 to K63 : Final line position of each file K256(H100) : File IDs stored in the CompactFlash card...
  • Page 806 FXCPU Structured Programming Manual 7 Applied Instructions (Basic & Applied Instruction) 7.28 FX3U-CF-ADP • When is "K1024 (H400)" The FLSTRD instruction reads the error information (error flag). Setting items Description Error detection signal b0 : The CompactFlash card is not mounted. b1 : The CompactFlash card is full.
  • Page 807 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.1 Outline Interrupt Function and Pulse Catch Function This chapter explains the built-in interrupt function and pulse catch function in FX PLCs. The input, special devices and timers in the explanations relate to the FX and FX PLCs.
  • Page 808 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.2 Common items Common items 8.2.1 Interrupt function Three types of interrupt, namely, input interrupt, timer interrupt and counter interrupt, are available. Observe the following in creating an interrupt program. 1) Create a task for interrupt and main program.
  • Page 809 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.2 Common items 8.2.2 How to disable interrupt function and pulse catch function This section describes how to disable the interrupt function and pulse catch function. 1.
  • Page 810 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.2 Common items 2. Disabling interrupt pointers (for each interrupt routine) [interrupt function] 1) Programming method The special auxiliary relays M8050 to M8059 for disabling interrupt are provided. While an interrupt disable flag (M8050 to M8059) is ON, a corresponding interrupt program is not executed even if the interrupt disable flag is set to OFF after a corresponding interrupt is generated.
  • Page 811 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.2 Common items 8.2.4 Cautions on use (common) This section explains common cautions on using the interrupt function or pulse catch function. Specific cautions on each interrupt function are explained in the description of each interrupt function. 1.
  • Page 812 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.2 Common items 2) Timing chart Execution of interrupt Interrupt program program I001 triggered by X000 X001 Because the C0 reset instruction Counter is valid, the current value of C0 is reset.
  • Page 813 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.3 Input Interrupt (Interrupt Triggered by External Signal) Input Interrupt (Interrupt Triggered by External Signal) [Without Delay Function] 8.3.1 Input Interrupt (Interrupt Triggered by External Signal) [Without Delay Function] 1.
  • Page 814 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.3 Input Interrupt (Interrupt Triggered by External Signal) 4. Number and operation of (six) interrupt pointers 0:Interrupt at falling edge 1:Interrupt at rising edge 0 to 5 according to the inputs X000 to X005 Pointer number Interrupt disable command Input number...
  • Page 815 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.3 Input Interrupt (Interrupt Triggered by External Signal) For the FX , FX , FX , FX and FX PLCs Input number Pulse width X000, X001 10μs , FX , FX...
  • Page 816 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.3 Input Interrupt (Interrupt Triggered by External Signal) 7. Program example 1) When using both an external input interrupt at the rising edge and the output refresh (REF instruction) In the program example shown below, the output Y000 immediately turns ON when the rising edge of the external input X000 is detected.
  • Page 817 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.3 Input Interrupt (Interrupt Triggered by External Signal) 3) When counting the number of times of input generation (in the same way as single phase high speed counter) In the program example shown below, external inputs are counted.
  • Page 818 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.3 Input Interrupt (Interrupt Triggered by External Signal) 8.3.2 Examples of practical programs (programs to measure short pulse width) By using a 1 ms retentive type timer or the special data register D8099 (high speed ring counter), the short pulse width can be measured in 1 ms or 0.1 ms units.
  • Page 819 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.3 Input Interrupt (Interrupt Triggered by External Signal) 2. Example of program to measure the short pulse width using a high speed ring counter (For and FX PLCs only) [Main program]...
  • Page 820 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.4 Input Interrupt (Interrupt by External Signal) [With Input Interrupt (Interrupt by External Signal) [With Delay function] 1. Outline An input interrupt has the function to delay execution of an interrupt routine in units of 1 ms. The delay time can be specified using the pattern program shown below.
  • Page 821 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.5 Timer Interrupt (Interrupt in Constant Cycle) Timer Interrupt (Interrupt in Constant Cycle) 8.5.1 Timer Interrupt (Interrupt in Constant Cycle) 1. Outline An interrupt routine is executed at every 10 to 99 ms without being affected by the operation cycle of a PLC. The FX , FX , FX...
  • Page 822 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.5 Timer Interrupt (Interrupt in Constant Cycle) 6. Program example In the program example shown below, data is added and addition result is compared with the set value at every 10 ms.
  • Page 823 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.5 Timer Interrupt (Interrupt in Constant Cycle) 2. Timer interrupt processing of RAMP instruction The ramp signal output circuit shown below is programmed using the timer interrupt function executed every 10 ms.
  • Page 824 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.6 Counter Interrupt - Interrupt Triggered by Counting Up Counter Interrupt - Interrupt Triggered by Counting Up of High Speed Counter 1. Outline This type of interrupt utilizes the current value of a high speed counter. The FX , FX , FX...
  • Page 825 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.7 Pulse Catch Function[M8170 to M8177] 6. Cautions 1) Pointer number Pointer numbers cannot overlap with each other. 2) Disabling interrupts When the special auxiliary relay M8059 is set to ON in a program, all counter interrupts are disabled. Pulse Catch Function[M8170 to M8177] When the input relay X000 to X007 turns ON from OFF after the EI instruction is executed, the special auxiliary relay M8170 to M8177 is set for interrupt processing.
  • Page 826 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.7 Pulse Catch Function[M8170 to M8177] 2. Program example The FX , FX , FX , FX or FX does not require the EI instruction. When the rising edge of X000 is detected, M8170 is set as interrupt.
  • Page 827 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.8 Pulse width/Pulse period measurement function Pulse width/Pulse period measurement function [M8075 to M8083, D8074 to D8097] This function is supported only in FX PLC Ver.1.10 or later. The pulse width/pulse period measurement function stores the values of 1/6 μs ring counters at the input signal rising edge and falling edge to special data registers.
  • Page 828 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.8 Pulse width/Pulse period measurement function 2) Pulse period measurement The pulse period of the input signal from X000 is measured. X000 This duration is measured. [Main program] EN ENO M8075...
  • Page 829 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.8 Pulse width/Pulse period measurement function 3) Signal delay time measurement The delay time from the rising edge of the input signal from X000 to the rising edge of the input signal from X001 is measured.
  • Page 830 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.8 Pulse width/Pulse period measurement function X001 Rising edge interrupt The interrupt routine is executed at the rising edge of [Interrupt program] the input signal from X001. (Event: I101) DMOV M8000...
  • Page 831 FXCPU Structured Programming Manual 8 Interrupt Function and Pulse Catch Function (Basic & Applied Instruction) 8.8 Pulse width/Pulse period measurement function VAR_01 to VAR_38 is a global label and define as following. Global label Defined device Global label Defined device VAR_03 D8074 VAR_36...
  • Page 832 FXCPU Structured Programming Manual Appendix A: Relationships between devices and (Basic & Applied Instruction) Appendix A: Relationships between devices and addresses The table below shows the relationships between devices and addresses. Example of corresponding device and Device and address address Device Device Address...
  • Page 833 FXCPU Structured Programming Manual Appendix A: Relationships between devices and (Basic & Applied Instruction) MEMO...
  • Page 834 FXCPU Structured Programming Manual (Basic & Applied Instruction) Warranty Warranty Please confirm the following product warranty details before using this product. 1. Gratis Warranty Term and Gratis Warranty Range 2. Onerous repair term after discontinuation of If any faults or defects (hereinafter "Failure") found to be production the responsibility of Mitsubishi occurs during use of the Mitsubishi shall accept onerous product repairs for...
  • Page 835 FXCPU Structured Programming Manual (Basic & Applied Instruction) Revised History Revised History Date created Revision Description 1/2009 First edition 7/2009 • Instructions are added: INV, MEP, MEF, RS,FLCRT, FLDEL, FLWR, FLRD, FLCMD, FLSTRD • The following instructions are provided in the FX series.
  • Page 836 FXCPU Structured Programming Manual (Basic & Applied Instruction) Revised History MEMO...
  • Page 837 FXCPU Structured Programming Manual [Basic & Applied Instruction] HEAD OFFICE: TOKYO BUILDING, 2-7-3 MARUNOUCHI, CHIYODA-KU, TOKYO 100-8310, JAPAN HIMEJI WORKS: 840, CHIYODA CHO, HIMEJI, JAPAN FX-KP-SM-E MODEL 09R926 MODEL CODE JY997D34701B Effective Jul. 2009 (MEE) Specifications are subject to change without notice.
  • Page 838 Phone: +380 (0)44 / 494 33 55 Fax: +380 (0)44 / 494-33-66 Mitsubishi Electric Europe B.V. /// FA - European Business Group /// Gothaer Straße 8 /// D-40880 Ratingen /// Germany Tel.: +49(0)2102-4860 /// Fax: +49(0)2102-4861120 /// info@mitsubishi-automation.com /// www.mitsubishi-automation.com...

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