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Fujitsu MHR2030AT 30GB Hard Drive Manuals
Manuals and User Guides for Fujitsu MHR2030AT 30GB Hard Drive. We have
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Fujitsu MHR2030AT 30GB Hard Drive manual available for free PDF download: Product Manual
Fujitsu MHR2030AT Product Manual (250 pages)
Fujitsu Computer Drive User Manual
Brand:
Fujitsu
| Category:
Storage
| Size: 1.53 MB
Table of Contents
Revision History
3
Operating Environment
6
Important Alert Items
9
Manual Organization
11
Table of Contents
13
CHAPTER 1 Device Overview
21
Features
22
Functions and Performance
22
Adaptability
22
Interface
23
Device Specifications
24
Specifications Summary
24
Table 1.1 Specifications
24
Model and Product Number
25
Power Requirements
25
Table 1.2 Model Names and Product Numbers
25
Table 1.3 Current and Power Dissipation
26
Environmental Specifications
27
Figure 1.1 Current Fluctuation (Typ.) at +5V When Power Is Turned on
27
Table 1.4 Environmental Specifications
27
Acoustic Noise
28
Shock and Vibration
28
Table 1.5 Acoustic Noise Specification
28
Table 1.6 Shock and Vibration Specification
28
Reliability
29
Error Rate
30
Media Defects
30
Load/Unload Function
30
CHAPTER 2 Device Configuration
33
Device Configuration
34
Figure 2.1 Disk Drive Outerview
34
Figure 2.2 Configuration of Disk Media Heads
35
System Configuration
36
ATA Interface
36
Drive Connection
36
Drives Connection
36
Figure 2.3 1 Drive System Configuration
36
Figure 2.4 2 Drives Configuration
36
CHAPTER 3 Installation Conditions
39
Figure 3.1 Dimensions
40
Mounting
41
Figure 3.2 Orientation
41
Figure 3.3 Mounting Frame Structure
42
Figure 3.4 Location of Breather
43
Figure 3.5 Surface Temperature Measurement Points
44
Table 3.1 Surface Temperature Measurement Points and Standard Values
44
Figure 3.6 Service Area
45
Figure 3.7 Handling Cautions
46
Cable Connections
47
Device Connector
47
Figure 3.8 Connector Locations
47
Device Connection
48
Figure 3.9 Cable Connections
48
Table 3.2 Cable Connector Specifications
48
Power Supply Connector (CN1)
49
Jumper Settings
49
Location of Setting Jumpers
49
Figure 3.10 Power Supply Connector Pins (CN1)
49
Figure 3.11 Jumper Location
49
Master Drive-Slave Drive Setting
50
Figure 3.12 Factory Default Setting
50
Figure 3.13 Jumper Setting of Master or Slave Drive
50
Figure 3.14 CSEL Setting
51
Figure 3.15 Example (1) of Cable Select
51
Power up in Standby Setting
52
Figure 3.16 Example (2) of Cable Select
52
CHAPTER 4 Theory of Device Operation
53
Outline
54
Subassemblies
54
Disk
54
Head
54
Spindle
55
Actuator
55
Air Filter
55
Figure 4.1 Head Structure
55
Circuit Configuration
56
Figure 4.2 Power Supply Configuration
57
Figure 4.3 Circuit Configuration
58
Power-On Sequence
59
Self-Calibration
60
Self-Calibration Contents
60
Figure 4.4 Power-On Operation Sequence
60
Execution Timing of Self-Calibration
61
Command Processing During Self-Calibration
62
Read/Write Circuit
62
Read/Write Preamplifier (HDIC)
62
Write Circuit
62
Figure 4.5 Read/Write Circuit Block Diagram
63
Read Circuit
64
Figure 4.6 Frequency Characteristic of Programmable Filter
64
Digital PLL Circuit
65
Servo Control
66
Figure 4.7 Block Diagram of Servo Control Circuit
66
Data-Surface Servo Format
69
Figure 4.8 Physical Sector Servo Configuration on Disk Surface
70
Figure 4.9 Servo Frame Format
71
Actuator Motor Control
72
Spindle Motor Control
73
CHAPTER 5 Interface
75
Physical Interface
76
Interface Signals
76
Figure 5.1 Interface Signals
76
Signal Assignment on the Connector
77
Table 5.1 Signal Assignment on the Interface Connector
77
Logical Interface
80
Table 5.2 I/O Registers
81
Command Block Registers
82
Control Block Registers
87
Host Commands
88
Command Code and Parameters
88
Table 5.3 Command Code and Parameters
89
Command Descriptions
92
Figure 5.2 Execution Example of READ MULTIPLE Command
95
Table 5.4 Information to be Read by IDENTIFY DEVICE Command
108
Table 5.5 Features Register Values and Settable Modes
118
Table 5.6 Diagnostic Code
130
Table 5.7 Features Register Values (Subcommands) and Functions
142
Table 5.8 Format of Device Attribute Value Data
146
Table 5.9 Format of Insurance Failure Threshold Value Data
146
Table 5.10 Log Directory Data Format
151
Table 5.11 Data Format of SMART Summary Error Log
152
Table 5.12 SMART Self Test Log Data Format
154
Table 5.13 Contents of Security Password
156
Table 5.14 Contents of SECURITY SET PASSWORD Data
160
Table 5.15 Relationship between Combination of Identifier and Security Level, and Operation of the Lock Function
161
Table 5.16 DEVICE CONFIGURATION IDENTIFY Data Structure
167
Error Posting
178
Table 5.17 Command Code and Parameters
178
Command Protocol
180
PIO Data Transferring Commands from Device to Host
180
Figure 5.3 Read Sector(S) Command Protocol
181
PIO Data Transferring Commands from Host to Device
182
Figure 5.4 Protocol for Command Abort
182
Commands Without Data Transfer
184
Figure 5.5 WRITE SECTOR(S) Command Protocol
184
Figure 5.6 Protocol for the Command Execution Without Data Transfer
185
Other Commands
186
DMA Data Transfer Commands
186
Figure 5.7 Normal DMA Data Transfer
188
Ultra DMA Feature Set
189
Overview
189
Phases of Operation
190
Ultra DMA Data in Commands
190
Initiating an Ultra DMA Data in Burst
190
The Data in Transfer
191
Pausing an Ultra DMA Data in Burst
191
Terminating an Ultra DMA Data in Burst
192
Ultra DMA Data out Commands
195
Initiating an Ultra DMA Data out Burst
195
The Data out Transfer
195
Pausing an Ultra DMA Data out Burst
196
Terminating an Ultra DMA Data out Burst
197
Ultra DMA CRC Rules
199
Series Termination Required for Ultra DMA
200
Figure 5.8 Ultra DMA Termination with Pull-Up or Pull-Down
200
Timing
201
PIO Data Transfer
201
Figure 5.9 PIO Data Transfer Timing
201
Multiword Data Transfer
202
Figure 5.10 Multiword DMA Data Transfer Timing (Mode 2)
202
Ultra DMA Data Transfer
203
Initiating an Ultra DMA Data in Burst
203
Figure 5.11 Initiating an Ultra DMA Data in Burst
203
Table 5.18 Ultra DMA Data Burst Timing Requirements
204
Table 5.19 Ultra DMA Sender and Recipient Timing Requirements
206
Sustained Ultra DMA Data in Burst
207
Figure 5.12 Sustained Ultra DMA Data in Burst
207
Host Pausing an Ultra DMA Data in Burst
208
Figure 5.13 Host Pausing an Ultra DMA Data in Burst
208
Device Terminating an Ultra DMA Data in Burst
209
Figure 5.14 Device Terminating an Ultra DMA Data in Burst
209
Host Terminating an Ultra DMA Data in Burst
210
Figure 5.15 Host Terminating an Ultra DMA Data in Burst
210
Initiating an Ultra DMA Data out Burst
211
Figure 5.16 Initiating an Ultra DMA Data out Burst
211
Sustained Ultra DMA Data out Burst
212
Figure 5.17 Sustained Ultra DMA Data out Burst
212
Device Pausing an Ultra DMA Data out Burst
213
Figure 5.18 Device Pausing an Ultra DMA Data out Burst
213
Host Terminating an Ultra DMA Data out Burst
214
Figure 5.19 Host Terminating an Ultra DMA Data out Burst
214
Device Terminating an Ultra DMA Data out Burst
215
Figure 5.20 Device Terminating an Ultra DMA Data out Burst
215
Power-On and Reset
216
Figure 5.21 Power-On Reset Timing
216
CHAPTER 6 Operations
217
Device Response to the Reset
218
Response to Power-On
218
Response to Hardware Reset
219
Figure 6.1 Response to Power-On
219
Figure 6.2 Response to Hardware Reset
220
Response to Software Reset
221
Figure 6.3 Response to Software Reset
221
Response to Diagnostic Command
222
Figure 6.4 Response to Diagnostic Command
222
Power Save
223
Power Save Mode
223
Power Commands
223
Defect Processing
225
Spare Area
225
Alternating Processing for Defective Sectors
225
Figure 6.5 Sector Slip Processing
226
Figure 6.6 Alternate Cylinder Assignment Processing
227
Read-Ahead Cache
228
Data Buffer Structure
228
Caching Operation
228
Figure 6.7 Data Buffer Structure
228
Using the Read Segment Buffer
230
Miss-Hit (no Hit
230
Sequential Reading
231
Full Hit
233
Partial Hit
234
Write Cache
235
Caching Operation
235
Acronyms and Abbreviations
241
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